Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 27 files:
- contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 626
- contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 142
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, line 1808
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 84
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, line 520
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- contrib/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
- contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
- contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
- contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 100
- contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 322
- contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 81
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 2719
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 288
- contrib/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 1649
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h, line 90
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 274
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 94
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86WinAllocaExpander.cpp