// SPDX-License-Identifier: GPL-2.0
/*
 * Support for CompuLab CM-T3517
 */
/dts-v1/;

#include "am3517.dtsi"
#include "omap3-cm-t3x.dtsi"

/ {
	model = "CompuLab CM-T3517";
	compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";

	vmmc:  regulator-vmmc {
                compatible = "regulator-fixed";
                regulator-name = "vmmc";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
        };

	wl12xx_vmmc2: wl12xx_vmmc2 {
		compatible = "regulator-fixed";
		regulator-name = "vw1271";
		pinctrl-names = "default";
		pinctrl-0 = <
				&wl12xx_wkup_pins
				&wl12xx_core_pins
			    >;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
		startup-delay-us = <20000>;
		enable-active-high;
	};

	wl12xx_vaux2: wl12xx_vaux2 {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271_vaux2";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};
};

&omap3_pmx_wkup {

	wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)	/* sys_boot2.gpio_4 */
			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4)	/* sys_boot4.gpio_6 */
		>;
	};
};

&omap3_pmx_core {

	phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4)	/* uart2_tx.gpio_146 */
		>;
	};

	phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4)	/* uart2_rx.gpio_147 */
		>;
	};

	otg_drv_vbus: pinmux_otg_drv_vbus {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	wl12xx_core_pins: pinmux_wl12xx_core_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4)	/* gpmc_ncs5.gpio_56 */
			OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4)	/* uart2_rts.gpio_145 */
		>;
	};

	usb_hub_pins: pinmux_usb_hub_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 - USB HUB RST */
		>;
	};
};

&hsusb1_phy {
	pinctrl-names = "default";
	pinctrl-0 = <&phy1_reset_pins>;
	reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
};

&hsusb2_phy {
	pinctrl-names = "default";
	pinctrl-0 = <&phy2_reset_pins>;
	reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
};

&davinci_emac {
	status = "okay";
};

&davinci_mdio {
	status = "okay";
};

&am35x_otg_hs {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&otg_drv_vbus>;
};

&mmc1 {
	vmmc-supply = <&vmmc>;
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&wl12xx_vmmc2>;
	vqmmc-supply = <&wl12xx_vaux2>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
		ref-clock-frequency = <38400000>;
	};
};

&dss {
	status = "ok";

	pinctrl-names = "default";
	pinctrl-0 = <
		&dss_dpi_pins_common
		&dss_dpi_pins_cm_t35x
	>;
};