Defined in 3 files as a member:
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FastISel.cpp, line 94 (as a member)
- contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp, line 132 (as a member)
- contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp, line 243 (as a member)
Referenced in 23 files:
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp