Defined in 2 files as a prototype:
Defined in 2 files as a function:
Referenced in 94 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineScheduler.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetPassConfig.h, line 145
- contrib/llvm-project/llvm/include/llvm/Target/TargetMachine.h
- contrib/llvm-project/llvm/lib/CodeGen/AtomicExpandPass.cpp, line 167
- contrib/llvm-project/llvm/lib/CodeGen/BranchFolding.cpp
- contrib/llvm-project/llvm/lib/CodeGen/CodeGenPrepare.cpp
- contrib/llvm-project/llvm/lib/CodeGen/DwarfEHPrepare.cpp
- contrib/llvm-project/llvm/lib/CodeGen/ExpandMemCmp.cpp, line 779
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Combiner.cpp, line 93
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp
- contrib/llvm-project/llvm/lib/CodeGen/IndirectBrExpandPass.cpp, line 78
- contrib/llvm-project/llvm/lib/CodeGen/InterleavedAccessPass.cpp, line 448
- contrib/llvm-project/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp, line 1323
- contrib/llvm-project/llvm/lib/CodeGen/LLVMTargetMachine.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LowerEmuTLS.cpp, line 67
- contrib/llvm-project/llvm/lib/CodeGen/MachineBlockPlacement.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SafeStack.cpp
- contrib/llvm-project/llvm/lib/CodeGen/StackProtector.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TypePromotion.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64TargetMachine.h, line 44
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp, line 395
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp, line 1372
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp, line 122
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp, line 368
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCTargetMachine.h
- contrib/llvm-project/llvm/lib/Target/ARM/ARMParallelDSP.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMTargetMachine.h, line 58
- contrib/llvm-project/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/MVETailPredication.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRTargetMachine.h, line 43
- contrib/llvm-project/llvm/lib/Target/BPF/BPFTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/BPF/BPFTargetMachine.h, line 35
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonTargetMachine.h, line 40
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiTargetMachine.h, line 46
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.h, line 39
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16HardFloat.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.h, line 60
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h, line 55
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp, line 194
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp, line 153
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetMachine.h, line 49
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetMachine.h, line 39
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcTargetMachine.h, line 38
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZTDC.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZTargetMachine.h, line 46
- contrib/llvm-project/llvm/lib/Target/VE/VETargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/VE/VETargetMachine.h, line 45
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h, line 42
- contrib/llvm-project/llvm/lib/Target/X86/X86PartialReduction.cpp, line 450
- contrib/llvm-project/llvm/lib/Target/X86/X86TargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86TargetMachine.h, line 50
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreTargetMachine.h, line 43
- contrib/llvm-project/llvm/tools/llc/llc.cpp