Defined in 7 files as a function:
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 132 (as a function)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 470 (as a function)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 1285 (as a function)
- contrib/llvm-project/llvm/lib/Target/ARM/ARMSubtarget.h, line 849 (as a function)
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonSubtarget.h, line 116 (as a function)
- contrib/llvm-project/llvm/lib/Target/Mips/MipsSubtarget.h, line 392 (as a function)
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 189 (as a function)
Referenced in 11 files:
- contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PostRASchedulerList.cpp, line 212
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp, line 48
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 51
- contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1520
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 637
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 128
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 449
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 95