Defined in 1 files as a member:
Referenced in 56 files:
- contrib/llvm-project/clang/include/clang/ASTMatchers/ASTMatchersInternal.h
- contrib/llvm-project/clang/lib/AST/DeclPrinter.cpp
- contrib/llvm-project/clang/lib/AST/DeclarationName.cpp
- contrib/llvm-project/clang/lib/Sema/SemaCodeComplete.cpp
- contrib/llvm-project/clang/lib/Sema/SemaCoroutine.cpp
- contrib/llvm-project/clang/lib/Sema/SemaExpr.cpp
- contrib/llvm-project/clang/lib/Sema/SemaLookup.cpp
- contrib/llvm-project/clang/lib/Sema/SemaOverload.cpp
- contrib/llvm-project/clang/lib/Tooling/Transformer/Parsing.cpp
- contrib/llvm-project/clang/lib/Tooling/Transformer/Stencil.cpp
- contrib/llvm-project/llvm/include/llvm/Demangle/ItaniumDemangle.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 915
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp, line 37
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp, line 215
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp, line 49
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 378
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp, line 356
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 587
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 203
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp, line 88
- contrib/llvm-project/llvm/utils/TableGen/AsmMatcherEmitter.cpp
- contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
- contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.h, line 979
- contrib/llvm-project/llvm/utils/TableGen/CodeGenInstruction.cpp
- contrib/llvm-project/llvm/utils/TableGen/FastISelEmitter.cpp
- contrib/llvm-project/llvm/utils/TableGen/GlobalISelEmitter.cpp
- sys/contrib/dev/acpica/compiler/asloffset.c