Defined in 2 files as a member:
Defined in 8 files as a macro:
Referenced in 85 files:
- contrib/binutils/opcodes/ia64-opc-a.c
- contrib/binutils/opcodes/ia64-opc-i.c
- contrib/binutils/opcodes/ia64-opc-m.c
- contrib/binutils/opcodes/ia64-opc-x.c, line 68
- contrib/gdb/gdb/dpx2-nat.c, line 39
- contrib/gdb/gdb/wince.c
- contrib/ldns/sha1.c
- contrib/llvm-project/clang/include/clang/AST/Expr.h, line 257
- contrib/llvm-project/clang/include/clang/Analysis/Analyses/ReachableCode.h, line 54
- contrib/llvm-project/clang/lib/ARCMigrate/TransformActions.cpp
- contrib/llvm-project/clang/lib/AST/Expr.cpp
- contrib/llvm-project/clang/lib/AST/RawCommentList.cpp
- contrib/llvm-project/clang/lib/Analysis/CFG.cpp
- contrib/llvm-project/clang/lib/Analysis/ReachableCode.cpp
- contrib/llvm-project/clang/lib/Sema/AnalysisBasedWarnings.cpp
- contrib/llvm-project/clang/lib/Sema/SemaStmt.cpp
- contrib/llvm-project/clang/lib/Tooling/Core/Replacement.cpp
- contrib/llvm-project/clang/utils/TableGen/NeonEmitter.cpp
- contrib/llvm-project/compiler-rt/lib/builtins/hexagon/fastmath2_dlib_asm.S
- contrib/llvm-project/compiler-rt/lib/builtins/hexagon/fastmath2_ldlib_asm.S
- contrib/llvm-project/compiler-rt/lib/builtins/hexagon/fastmath_dlib_asm.S
- contrib/llvm-project/libunwind/src/Unwind-seh.cpp, line 91
- contrib/llvm-project/llvm/include/llvm/MC/MCDwarf.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 521
- contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp, line 114
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 47
- contrib/llvm-project/llvm/lib/Target/ARM/ARMCallingConv.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFastISel.cpp, line 3050
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h, line 163
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 56
- contrib/llvm-project/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, line 500
- contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 61
- contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp, line 61
- contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp, line 97
- contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.h, line 247
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp, line 669
- contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp, line 263
- contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp, line 156
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 46
- contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h, line 44
- contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp, line 96
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 399
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/VE/VEAsmPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 1348
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreISelLowering.h, line 138
- contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
- contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
- contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
- contrib/llvm-project/llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
- contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.h
- contrib/ntp/lib/isc/sha1.c
- contrib/wpa/src/crypto/sha1-internal.c
- crypto/openssh/openbsd-compat/sha1.c
- crypto/openssl/crypto/md4/md4_dgst.c
- crypto/openssl/crypto/md5/md5_dgst.c
- crypto/openssl/crypto/sm3/sm3.c
- sys/cddl/dev/dtrace/arm/regset.h, line 50
- sys/crypto/openssl/arm/poly1305-armv4.S, line 487