Defined in 6 files as a prototype:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MIRParser/MIParser.h, line 142 (as a prototype)
• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 105 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 280 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 128 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 129 (as a prototype)
• contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.h, line 722 (as a prototype)

Defined in 12 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, line 103 (as a function)
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 631 (as a function)
• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 684 (as a function)
• contrib/llvm-project/llvm/include/llvm/MC/MCRegisterInfo.h, line 536 (as a function)
• contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIParser.cpp, line 305 (as a function)
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 47 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, line 1927 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 1035 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, line 1861 (as a function)
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 170 (as a function)
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 198 (as a function)
• contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.cpp, line 1278 (as a function)

Referenced in 185 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, 2 times
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp, line 36
• contrib/llvm-project/llvm/lib/CodeGen/BreakFalseDeps.cpp, line 135
• contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp, line 72
• contrib/llvm-project/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/DetectDeadLanes.cpp, 5 times
• contrib/llvm-project/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 599
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp, line 62
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp, line 88
• contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp, 6 times
• contrib/llvm-project/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1200
• contrib/llvm-project/llvm/lib/CodeGen/LiveIntervals.cpp, line 1713
• contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/LiveRangeShrink.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, line 538
• contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp, line 667
• contrib/llvm-project/llvm/lib/CodeGen/MachineInstr.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp, 4 times
• contrib/llvm-project/llvm/lib/CodeGen/MachineLoopUtils.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp, line 390
• contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 61
• contrib/llvm-project/llvm/lib/CodeGen/MachineSink.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp, 4 times
• contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp, 15 times
• contrib/llvm-project/llvm/lib/CodeGen/OptimizePHIs.cpp, line 181
• contrib/llvm-project/llvm/lib/CodeGen/PHIElimination.cpp, line 311
• contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, 11 times
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocBase.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp, 5 times
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocGreedy.cpp, 10 times
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocPBQP.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp, 10 times
• contrib/llvm-project/llvm/lib/CodeGen/RegisterScavenging.cpp, line 667
• contrib/llvm-project/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 134
• contrib/llvm-project/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 371
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, 12 times
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, 3 times
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, line 965
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, line 532
• contrib/llvm-project/llvm/lib/CodeGen/SplitKit.cpp, 2 times
• contrib/llvm-project/llvm/lib/CodeGen/TailDuplicator.cpp, 5 times
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp, 5 times
• contrib/llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 1144
• contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp, 4 times
• contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, 5 times
• contrib/llvm-project/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 185
• contrib/llvm-project/llvm/lib/CodeGen/VirtRegMap.cpp, 3 times
• contrib/llvm-project/llvm/lib/MC/MCInstPrinter.cpp, line 106
• contrib/llvm-project/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp, line 88
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, line 519
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 160
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FastISel.cpp, line 3895
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 12 times
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 539
• contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp, line 4524
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp, 12 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, 9 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp, line 257
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp, line 195
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp, line 612
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp, line 93
• contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp, line 633
• contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp, 8 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp, line 215
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, 11 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 162
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 9 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 58 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h, 3 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 1663
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 101
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 1193
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp, line 107
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, 2 times
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 839
• contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/ARM/A15SDOptimizer.cpp, 8 times
• contrib/llvm-project/llvm/lib/Target/ARM/ARMAsmPrinter.cpp, line 384
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/ARM/ARMFastISel.cpp, line 2146
• contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 1547
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp, line 778
• contrib/llvm-project/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp, 9 times
• contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 288
• contrib/llvm-project/llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp, line 155
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, line 484
• contrib/llvm-project/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 286
• contrib/llvm-project/llvm/lib/Target/BPF/BPFMIPeephole.cpp, line 104
• contrib/llvm-project/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp, line 162
• contrib/llvm-project/llvm/lib/Target/Hexagon/BitTracker.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 18 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 279
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1946
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 8 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, 6 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 241
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, 10 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 443
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonVExtract.cpp, line 139
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp, line 749
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 508
• contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp, 21 times
• contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp, line 583
• contrib/llvm-project/llvm/lib/Target/Mips/MipsFastISel.cpp, line 1731
• contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp, 10 times
• contrib/llvm-project/llvm/lib/Target/Mips/MipsInstructionSelector.cpp, line 431
• contrib/llvm-project/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 139
• contrib/llvm-project/llvm/lib/Target/Mips/MipsOptionRecord.h, 9 times
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 119
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp, 11 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, line 390
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 11 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, line 54
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp, line 123
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, line 8039
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 8 times
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp, line 42
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp, line 59
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, line 803
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp, 3 times
• contrib/llvm-project/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/X86/X86CmovConversion.cpp, line 757
• contrib/llvm-project/llvm/lib/Target/X86/X86DomainReassignment.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/X86/X86FastISel.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp, 2 times
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp, 14 times
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, 18 times
• contrib/llvm-project/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, 4 times
• contrib/llvm-project/llvm/lib/Target/X86/X86RegisterBankInfo.cpp, line 38
• contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp, 5 times
• contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp, line 72
• contrib/llvm-project/llvm/utils/TableGen/CodeGenTarget.h, line 122
• contrib/llvm-project/llvm/utils/TableGen/GlobalISelEmitter.cpp, 2 times
• contrib/llvm-project/llvm/utils/TableGen/RegisterBankEmitter.cpp, line 68