Defined in 1 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 528 (as a function)

Referenced in 15 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 537
• contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp, line 449
• contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 427
• contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1516
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp, line 788
• contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 2107
• contrib/llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 2155
• contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 389
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 242
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp, line 2377
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 1339
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
  • line 190
  • line 219
  • line 229
  • line 240
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 309
• contrib/llvm-project/llvm/lib/Target/ARM/MLxExpansionPass.cpp
  • line 122
  • line 130
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 1455