Defined in 1 files as a member:
Referenced in 59 files:
- bin/sh/parser.c, line 464
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/WinException.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GCRootLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineFrameInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp
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- contrib/llvm-project/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm-project/llvm/lib/CodeGen/ShrinkWrap.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/VE/VEISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp