Defined in 1 files as a prototype:
Defined in 6 files as a function:
Referenced in 69 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, line 775
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h, line 291
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
- contrib/llvm-project/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp, line 176
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp, line 31
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp, line 46
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp, line 42
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, line 227
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/IfConversion.cpp
- contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp, line 882
- contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp, line 237
- contrib/llvm-project/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp, line 415
- contrib/llvm-project/llvm/lib/CodeGen/MIRPrinter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineBasicBlock.cpp, line 157
- contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp, line 292
- contrib/llvm-project/llvm/lib/CodeGen/MachineInstr.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineOutliner.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp, line 2194
- contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp, line 2795
- contrib/llvm-project/llvm/lib/CodeGen/MachineSink.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1785
- contrib/llvm-project/llvm/lib/CodeGen/RDFLiveness.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 446
- contrib/llvm-project/llvm/lib/CodeGen/RegisterScavenging.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetSchedule.cpp, line 304
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, line 110
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 583
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SLSHardening.cpp, line 326
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp, line 767
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp, line 295
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 5646
- contrib/llvm-project/llvm/lib/Target/ARM/ARMCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp, line 366
- contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 2551
- contrib/llvm-project/llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp, line 139
- contrib/llvm-project/llvm/lib/Target/BPF/BTFDebug.cpp, line 1084
- contrib/llvm-project/llvm/lib/Target/Hexagon/RDFCopy.cpp, line 102
- contrib/llvm-project/llvm/lib/Target/Hexagon/RDFCopy.h, line 29
- contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp, line 52
- contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 460
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp, line 89
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp