Defined in 9 files as a function:
Referenced in 56 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 282
- contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h, line 89
- contrib/llvm-project/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineOperand.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp, line 4377
- contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 603
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 294
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 100
- contrib/llvm-project/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRMCInstLower.cpp, line 28
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 716
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, line 1125
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiMCInstLower.cpp, line 70
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 662
- contrib/llvm-project/llvm/lib/Target/Mips/MipsInstructionSelector.cpp, line 678
- contrib/llvm-project/llvm/lib/Target/Mips/MipsMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 289
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp, line 103
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp, line 33
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 294
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcMCInstLower.cpp, line 34
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp, line 88
- contrib/llvm-project/llvm/lib/Target/VE/VEMCInstLower.cpp, line 31
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86AsmPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ExpandPseudo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86MCInstLower.cpp