Defined in 3 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h, line 329 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, line 346 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 58 (as a function)

Referenced in 55 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h
  • line 556
  • line 677
• contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 925
• contrib/llvm-project/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1341
• contrib/llvm-project/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
  • line 324
  • line 369
• contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp, line 442
• contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp, line 1489
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp, line 1592
• contrib/llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp
  • line 188
  • line 1199
• contrib/llvm-project/llvm/lib/CodeGen/RegisterScavenging.cpp, line 453
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, line 575
• contrib/llvm-project/llvm/lib/CodeGen/ShrinkWrap.cpp
  • line 303
  • line 305
• contrib/llvm-project/llvm/lib/CodeGen/StackColoring.cpp
  • line 606
  • line 682
  • line 994
  • line 1122
• contrib/llvm-project/llvm/lib/CodeGen/StackSlotColoring.cpp
  • line 168
  • line 402
• contrib/llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp
  • line 1036
  • line 1045
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 66
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  • line 234
  • line 3096
  • line 3110
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  • line 1109
  • line 1703
  • line 1728
  • line 2003
  • line 2073
  • line 2079
  • line 2107
  • line 2539
  • line 2580
  • line 6393
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  • line 454
  • line 555
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, line 6907
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  • line 50
  • line 175
  • line 240
  • line 298
  • line 405
  • line 642
  • line 1175
  • line 1554
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 214
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 351
  • line 1860
  • line 3236
  • line 3589
  • line 4283
  • line 4340
  • line 6441
  • line 6454
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 490
  • line 504
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 94
• contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.cpp
  • line 72
  • line 91
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 1264
  • line 1276
  • line 1283
  • line 1292
  • line 1298
  • line 1501
  • line 1513
  • line 1520
  • line 1535
  • line 1541
  • line 2251
  • line 5907
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
  • line 558
  • line 676
  • line 697
• contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 1532
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, line 458
• contrib/llvm-project/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, line 440
• contrib/llvm-project/llvm/lib/Target/AVR/AVRFrameLowering.cpp, line 445
• contrib/llvm-project/llvm/lib/Target/AVR/AVRInstrInfo.cpp
  • line 87
  • line 106
• contrib/llvm-project/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 75
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
  • line 239
  • line 1154
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
  • line 303
  • line 1775
  • line 1808
  • line 1839
  • line 1876
  • line 1914
  • line 1979
  • line 2024
  • line 2055
  • line 2320
  • line 2723
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 261
  • line 275
  • line 309
  • line 327
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 206
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
  • line 474
  • line 720
  • line 749
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
  • line 171
  • line 186
  • line 204
  • line 229
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
  • line 51
  • line 73
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, line 61
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  • line 647
  • line 699
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  • line 1322
  • line 1347
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  • line 56
  • line 79
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp, line 231
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
  • line 48
  • line 67
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
  • line 312
  • line 335
  • line 336
  • line 1949
• contrib/llvm-project/llvm/lib/Target/VE/VEInstrInfo.cpp
  • line 347
  • line 368
• contrib/llvm-project/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp, line 320
• contrib/llvm-project/llvm/lib/Target/X86/X86FrameLowering.cpp, line 3322
• contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp, line 4477
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 679
  • line 8324
  • line 8356
  • line 8903
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h
  • line 111
  • line 124
• contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  • line 1345
  • line 1585
• contrib/llvm-project/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
  • line 67
  • line 87