Defined in 2 files as a member:
- contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 370 (as a member)
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h, line 141 (as a member)
Referenced in 42 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h, line 1442
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h
- contrib/llvm-project/llvm/include/llvm/MC/MCInstrItineraries.h
- contrib/llvm-project/llvm/include/llvm/MC/MCSubtargetInfo.h
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp
- contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveIntervalCalc.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIParser.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineCombiner.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineInstr.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h, line 160
- contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetSchedule.cpp
- contrib/llvm-project/llvm/lib/MC/MCDisassembler/Disassembler.cpp
- contrib/llvm-project/llvm/lib/MC/MCSchedule.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 311
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp, line 7914
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h, line 481