Defined in 6 files as a member:
- contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/Checker.h, line 555 (as a member)
- contrib/llvm-project/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp, line 318 (as a member)
- contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp, line 1520 (as a member)
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, line 157 (as a member)
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 74 (as a member)
- contrib/llvm-project/llvm/utils/TableGen/X86FoldTablesEmitter.cpp, line 103 (as a member)
Referenced in 31 files:
- contrib/llvm-project/clang/include/clang/Basic/TargetBuiltins.h, line 235
- contrib/llvm-project/clang/lib/CodeGen/CGAtomic.cpp
- contrib/llvm-project/clang/lib/CodeGen/CGBuiltin.cpp
- contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp, line 154
- contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp, line 250
- contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
- contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp, line 130
- contrib/llvm-project/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
- contrib/llvm-project/llvm/lib/Analysis/Loads.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 109
- contrib/llvm-project/llvm/lib/Target/ARC/ARCOptAddrMode.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
- contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h, line 136
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
- contrib/llvm-project/llvm/utils/TableGen/X86FoldTablesEmitter.cpp