Defined in 34 files as a member:

• contrib/llvm-project/llvm/include/llvm/CodeGen/AsmPrinter.h, line 105 (as a member)
• contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h, line 59 (as a member)
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 66 (as a member)
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineScheduler.h, line 122 (as a member)
• contrib/llvm-project/llvm/include/llvm/CodeGen/RDFGraph.h, line 873 (as a member)
• contrib/llvm-project/llvm/include/llvm/CodeGen/RDFLiveness.h, line 103 (as a member)
• contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp, line 91 (as a member)
• contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp, line 164 (as a member)
• contrib/llvm-project/llvm/lib/CodeGen/ShrinkWrap.cpp, line 113 (as a member)
• contrib/llvm-project/llvm/lib/CodeGen/SplitKit.h, line 264 (as a member)
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp, line 404 (as a member)
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp, line 76 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp, line 239 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp, line 42 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp, line 44 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, line 174 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, line 112 (as a member)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 58 (as a member)
• contrib/llvm-project/llvm/lib/Target/ARC/ARCOptAddrMode.cpp, line 62 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, line 232 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, line 967 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, line 1789 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 385 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 217 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 167 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 573 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 104 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 85 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 81 (as a member)
• contrib/llvm-project/llvm/lib/Target/Hexagon/RDFCopy.h, line 43 (as a member)
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 149 (as a member)
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp, line 93 (as a member)
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 96 (as a member)
• contrib/llvm-project/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 95 (as a member)

Referenced in 58 files:

• contrib/llvm-project/clang/lib/AST/ASTDiagnostic.cpp
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• contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h, line 65
• contrib/llvm-project/llvm/include/llvm/CodeGen/LiveRangeCalc.h, line 192
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineLoopInfo.h
  • line 93
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• contrib/llvm-project/llvm/include/llvm/CodeGen/RDFGraph.h, line 665
• contrib/llvm-project/llvm/include/llvm/CodeGen/RDFLiveness.h, line 55
• contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  • line 1076
  • line 1077
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• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  • line 40
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• contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp
  • line 145
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• contrib/llvm-project/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
  • line 66
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• contrib/llvm-project/llvm/lib/CodeGen/LiveRangeCalc.cpp
  • line 53
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• contrib/llvm-project/llvm/lib/CodeGen/MachineBasicBlock.cpp
  • line 1100
  • line 1102
• contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp, line 139
• contrib/llvm-project/llvm/lib/CodeGen/MachineLoopInfo.cpp
  • line 47
  • line 49
• contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp, line 219
• contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp, line 377
• contrib/llvm-project/llvm/lib/CodeGen/PHIElimination.cpp
  • line 220
  • line 221
• contrib/llvm-project/llvm/lib/CodeGen/RDFGraph.cpp
  • line 654
  • line 1678
• contrib/llvm-project/llvm/lib/CodeGen/RDFLiveness.cpp
  • line 184
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• contrib/llvm-project/llvm/lib/CodeGen/ShrinkWrap.cpp
  • line 190
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  • line 385
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  • line 559
• contrib/llvm-project/llvm/lib/CodeGen/SplitKit.cpp
  • line 378
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• contrib/llvm-project/llvm/lib/CodeGen/UnreachableBlockElim.cpp
  • line 107
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• contrib/llvm-project/llvm/lib/CodeGen/XRayInstrumentation.cpp
  • line 172
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• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
  • line 411
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• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
  • line 81
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  • line 180
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
  • line 246
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
  • line 48
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
  • line 51
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  • line 66
  • line 132
  • line 135
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
  • line 163
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  • line 390
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 1880
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• contrib/llvm-project/llvm/lib/Target/ARC/ARCOptAddrMode.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
  • line 789
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
  • line 292
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• contrib/llvm-project/llvm/lib/Target/Hexagon/RDFCopy.cpp, line 81
• contrib/llvm-project/llvm/lib/Target/Hexagon/RDFCopy.h, line 28
• contrib/llvm-project/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
  • line 201
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
  • line 218
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
  • line 198
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  • line 145
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.h
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
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