Defined in 2 files as a member:
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 31 (as a member)
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 319 (as a member)
Referenced in 67 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineTraceMetrics.h, line 315
- contrib/llvm-project/llvm/include/llvm/CodeGen/RegisterScavenging.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 926
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetSchedule.h, line 175
- contrib/llvm-project/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
- contrib/llvm-project/llvm/lib/CodeGen/DetectDeadLanes.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Localizer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveIntervals.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineSSAUpdater.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineTraceMetrics.cpp
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- contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp
- contrib/llvm-project/llvm/lib/CodeGen/OptimizePHIs.cpp
- contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterScavenging.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TailDuplicator.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TargetSchedule.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.h, line 322
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/MLxExpansionPass.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 312
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
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- contrib/llvm-project/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16RegisterInfo.h, line 32
- contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.h, line 245
- contrib/llvm-project/llvm/lib/Target/X86/X86DomainReassignment.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp, line 7915
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h, line 482
- contrib/llvm-project/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp