Defined in 2 files as a enumerator:
Referenced in 60 files:
- contrib/apr/random/unix/sha2.c, line 101
- contrib/ldns/sha2.c
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/IfConversion.cpp, line 1514
- contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIParser.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SplitKit.cpp, line 526
- contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1689
- contrib/llvm-project/llvm/lib/TableGen/TGLexer.cpp
- contrib/llvm-project/llvm/lib/TableGen/TGLexer.h, line 69
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, line 638
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 980
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, line 901
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 85
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 339
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 1033
- contrib/llvm-project/llvm/lib/Target/ARC/ARCFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 343
- contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFastISel.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRFrameLowering.cpp, line 82
- contrib/llvm-project/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp, line 104
- contrib/llvm-project/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 651
- contrib/llvm-project/llvm/lib/Target/BPF/BPFInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 638
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsFastISel.cpp, line 745
- contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, line 468
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 767
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, line 858
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 651
- contrib/llvm-project/llvm/lib/Target/X86/X86ExpandPseudo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp, line 112
- contrib/ntp/lib/isc/sha2.c, line 280
- contrib/subversion/subversion/include/private/svn_dep_compat.h
- contrib/unbound/compat/sha512.c
- crypto/openssh/openbsd-compat/sha2.c, line 97