Defined in 1 files as a function:

• contrib/llvm-project/llvm/include/llvm/MC/MCRegister.h, line 26 (as a function)

Referenced in 90 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/LiveIntervalCalc.h, line 54
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineBasicBlock.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineFunction.h, line 696
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/Register.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h
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• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
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• contrib/llvm-project/llvm/include/llvm/MC/MCRegister.h
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• contrib/llvm-project/llvm/include/llvm/MC/MCRegisterInfo.h
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• contrib/llvm-project/llvm/include/llvm/MC/MCStreamer.h
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• contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp, line 65
• contrib/llvm-project/llvm/lib/CodeGen/MachineBasicBlock.cpp
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• contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp, line 662
• contrib/llvm-project/llvm/lib/CodeGen/MachineInstr.cpp, line 2000
• contrib/llvm-project/llvm/lib/CodeGen/MachineOperand.cpp, line 87
• contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/CodeGen/RegAllocGreedy.cpp
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• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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• contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/MC/MCAsmStreamer.cpp
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• contrib/llvm-project/llvm/lib/MC/MCRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/MC/MCStreamer.cpp
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 804
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 275
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
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• contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 223
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 137
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/Thumb1InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AVR/AVRInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AVR/AVRInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/BPF/BPFInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/BPF/BPFInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/MSP430/MSP430InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Mips/Mips16InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 364
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.h, line 94
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h
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• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.h
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• contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/VE/VEInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/VE/VEInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.cpp, line 88
• contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.h, line 33
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/X86/AsmParser/X86Operand.h
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/XCore/XCoreInstrInfo.h
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