SIInstrInfo identifier - Freebsd-lockdoc source code (lockdoc-v13.0-0.6) - Bootlin

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Embedded Linux, kernel,

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Elixir Cross Referencer

Defined in 1 files as a prototype:

contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 174 (as a prototype)

Defined in 1 files as a function:

contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 94 (as a function)

Referenced in 47 files:

contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h, line 66
contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
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contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp, line 68
contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp, line 65
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp, line 51
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.h, line 16
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp, line 50
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.h, line 429
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 253
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp, line 38
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 30
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp, line 39
contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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contrib/llvm-project/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 151