Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 48 files:
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 636
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 441
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp, line 74
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp, line 142
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp, line 50
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 74
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.h, line 18
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 55
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 207
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 86
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 499
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp, line 49
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp, line 1800
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.h, line 430
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 273
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 74
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp, line 51
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp, line 39
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 31
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 152