Defined in 1 files as a member:

• contrib/llvm-project/llvm/include/llvm/MC/MCInstrDesc.h, line 195 (as a member)

Referenced in 70 files:

• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 6926
• contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp, line 306
• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600Defines.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
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• contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 824
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMFastISel.cpp, line 266
• contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 1552
• contrib/llvm-project/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp, line 10526
• contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/MLxExpansionPass.cpp
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• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, line 479
• contrib/llvm-project/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, line 370
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 222
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
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• contrib/llvm-project/llvm/lib/Target/Mips/MipsInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
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• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp, line 2279
• contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp, line 265
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, line 306
• contrib/llvm-project/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp, line 293
• contrib/llvm-project/llvm/lib/Target/X86/X86DiscriminateMemOps.cpp, line 129
• contrib/llvm-project/llvm/lib/Target/X86/X86DomainReassignment.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86EvexToVex.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86FixupLEAs.cpp, line 462
• contrib/llvm-project/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 420
• contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86InsertPrefetch.cpp, line 195
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrFMA3Info.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstrFMA3Info.h, line 93
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h, line 550
• contrib/llvm-project/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp, line 785
• contrib/llvm-project/llvm/lib/Target/X86/X86MCInstLower.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
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