Defined in 4 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 915 (as a function)
• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 115 (as a function)
• contrib/llvm-project/llvm/include/llvm/MC/MCRegisterInfo.h, line 88 (as a function)
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp, line 198 (as a function)

Referenced in 22 files:

• contrib/llvm-project/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  • line 645
  • line 856
• contrib/llvm-project/llvm/lib/CodeGen/CalcSpillWeights.cpp, line 256
• contrib/llvm-project/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, line 569
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp, line 97
• contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp, line 345
• contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 1634
  • line 1647
• contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp
  • line 59
  • line 161
  • line 530
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp
  • line 586
  • line 2435
• contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1439
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
  • line 674
  • line 695
  • line 1062
  • line 1172
  • line 1257
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocPBQP.cpp, line 458
• contrib/llvm-project/llvm/lib/CodeGen/RegisterPressure.cpp
  • line 524
  • line 559
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 332
• contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp
  • line 194
  • line 200
  • line 231
  • line 247
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp, line 133
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp, line 623
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  • line 346
  • line 436
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp, line 242
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, line 411
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 1711
  • line 1715
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 225
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 161