Defined in 1 files as a prototype:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h, line 758 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm-project/llvm/lib/CodeGen/MachineOperand.cpp, line 236 (as a function)

Referenced in 36 files:

• contrib/llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp
  • line 1214
  • line 1237
  • line 1258
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 3776
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  • line 614
  • line 653
  • line 676
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  • line 1770
  • line 1773
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, line 749
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 637
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 1871
  • line 4187
  • line 4378
  • line 4385
  • line 4411
  • line 4450
  • line 4455
  • line 4482
  • line 4488
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 1210
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 514
  • line 1411
  • line 1454
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 382
• contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 189
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 2594
  • line 2607
  • line 2698
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
  • line 829
  • line 841
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  • line 499
  • line 520
  • line 534
  • line 568
  • line 673
• contrib/llvm-project/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
  • line 399
  • line 487
  • line 528
  • line 532
  • line 550
  • line 554
• contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp
  • line 158
  • line 247
• contrib/llvm-project/llvm/lib/Target/BPF/BPFRegisterInfo.cpp
  • line 88
  • line 119
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 242
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
  • line 217
  • line 219
  • line 239
• contrib/llvm-project/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
  • line 136
  • line 153
• contrib/llvm-project/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp, line 141
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, line 256
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, line 73
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp, line 125
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  • line 2857
  • line 2861
  • line 4029
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  • line 1125
  • line 1209
  • line 1210
  • line 1328
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 182
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
  • line 118
  • line 140
  • line 158
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
  • line 273
  • line 288
  • line 311
  • line 312
  • line 329
• contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.cpp, line 102
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
  • line 84
  • line 106
  • line 133
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrBuilder.h, line 135
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp, line 6257
• contrib/llvm-project/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
  • line 562
  • line 565
  • line 568
• contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 763
• contrib/llvm-project/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 285