Defined in 1 files as a prototype:

• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 422 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp, line 171 (as a function)

Referenced in 77 files:

• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp, line 27
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h, line 18
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp, line 581
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, line 44
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFrameLowering.h, line 19
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIModeRegister.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp, line 91
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp, line 1393
• contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
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