Defined in 2 files as a struct:
- contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h, line 75 (as a struct)
- contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h, line 32 (as a struct)
Defined in 5 files as a member:
- contrib/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h, line 169 (as a member)
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/Utils.h, line 132 (as a member)
- contrib/llvm-project/llvm/include/llvm/CodeGen/MIRParser/MIParser.h, line 44 (as a member)
- contrib/llvm-project/llvm/include/llvm/CodeGen/RegAllocPBQP.h, line 259 (as a member)
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h, line 46 (as a member)
Referenced in 82 files:
- contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h, line 81
- contrib/llvm-project/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h, line 38
- contrib/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 117
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/RegAllocPBQP.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h, line 1491
- contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/Utils.cpp
- contrib/llvm-project/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveIntervalUnion.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveIntervals.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIParser.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRPrinter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MIRVRegNamerUtils.h
- contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegAllocPBQP.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterScavenging.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h, line 82
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SplitKit.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SwiftErrorValueTracking.cpp
- contrib/llvm-project/llvm/lib/CodeGen/TailDuplicator.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARC/ARCOptAddrMode.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/BPF/BPFISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.h, line 46
- contrib/llvm-project/llvm/lib/Target/Mips/MipsFastISel.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/VE/VEISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreISelLowering.cpp