Defined in 1 files as a prototype:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 565 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 419 (as a function)

Referenced in 34 files:

• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  • line 678
  • line 828
• contrib/llvm-project/llvm/lib/CodeGen/LiveRangeEdit.cpp, line 329
• contrib/llvm-project/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 192
• contrib/llvm-project/llvm/lib/CodeGen/MachineCSE.cpp, line 174
• contrib/llvm-project/llvm/lib/CodeGen/MachineLICM.cpp, line 851
• contrib/llvm-project/llvm/lib/CodeGen/MachineSink.cpp
  • line 228
  • line 480
• contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp
  • line 468
  • line 1509
• contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp, line 787
• contrib/llvm-project/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 2096
• contrib/llvm-project/llvm/lib/CodeGen/TailDuplicator.cpp, line 249
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 715
• contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 386
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
  • line 218
  • line 230
  • line 313
  • line 332
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 102
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  • line 3912
  • line 5511
  • line 5528
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  • line 1063
  • line 1074
  • line 3976
  • line 4867
  • line 5051
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp, line 2373
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp, line 53
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 2533
  • line 2667
  • line 2750
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 179
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 308
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 2238
  • line 3250
• contrib/llvm-project/llvm/lib/Target/ARM/MLxExpansionPass.cpp
  • line 118
  • line 128
  • line 301
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 461
• contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, line 120
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, line 11969
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 387
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  • line 527
  • line 572
  • line 616
  • line 660
  • line 765
  • line 782
  • line 1133
  • line 1615
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
  • line 476
  • line 478
  • line 486
  • line 488
  • line 510
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, line 662
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 479
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 102
• contrib/llvm-project/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp, line 544
• contrib/llvm-project/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 618