# SPDX-License-Identifier: GPL-2.0
config [31mCONFIG_MIPS[0m
bool
default y
select [31mCONFIG_ARCH_32BIT_OFF_T[0m if ![31mCONFIG_64BIT[0m
select [31mCONFIG_ARCH_BINFMT_ELF_STATE[0m if [31mCONFIG_MIPS_FP_SUPPORT[0m
select [31mCONFIG_ARCH_CLOCKSOURCE_DATA[0m
select [31mCONFIG_ARCH_HAS_TICK_BROADCAST[0m if [31mCONFIG_GENERIC_CLOCKEVENTS_BROADCAST[0m
select [31mCONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL[0m
select [31mCONFIG_ARCH_SUPPORTS_UPROBES[0m
select [31mCONFIG_ARCH_USE_BUILTIN_BSWAP[0m
select [31mCONFIG_ARCH_USE_CMPXCHG_LOCKREF[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_ARCH_USE_QUEUED_RWLOCKS[0m
select [31mCONFIG_ARCH_USE_QUEUED_SPINLOCKS[0m
select [31mCONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT[0m if [31mCONFIG_MMU[0m
select [31mCONFIG_ARCH_WANT_IPC_PARSE_VERSION[0m
select [31mCONFIG_BUILDTIME_EXTABLE_SORT[0m
select [31mCONFIG_CLONE_BACKWARDS[0m
select [31mCONFIG_CPU_NO_EFFICIENT_FFS[0m if ([31mCONFIG_TARGET_ISA_REV[0m < 1)
select [31mCONFIG_CPU_PM[0m if [31mCONFIG_CPU_IDLE[0m
select [31mCONFIG_GENERIC_ATOMIC64[0m if ![31mCONFIG_64BIT[0m
select [31mCONFIG_GENERIC_CLOCKEVENTS[0m
select [31mCONFIG_GENERIC_CMOS_UPDATE[0m
select [31mCONFIG_GENERIC_CPU_AUTOPROBE[0m
select [31mCONFIG_GENERIC_GETTIMEOFDAY[0m
select [31mCONFIG_GENERIC_IOMAP[0m
select [31mCONFIG_GENERIC_IRQ_PROBE[0m
select [31mCONFIG_GENERIC_IRQ_SHOW[0m
select [31mCONFIG_GENERIC_ISA_DMA[0m if [31mCONFIG_EISA[0m
select [31mCONFIG_GENERIC_LIB_ASHLDI3[0m
select [31mCONFIG_GENERIC_LIB_ASHRDI3[0m
select [31mCONFIG_GENERIC_LIB_CMPDI2[0m
select [31mCONFIG_GENERIC_LIB_LSHRDI3[0m
select [31mCONFIG_GENERIC_LIB_UCMPDI2[0m
select [31mCONFIG_GENERIC_SCHED_CLOCK[0m if ![31mCONFIG_CAVIUM_OCTEON_SOC[0m
select [31mCONFIG_GENERIC_SMP_IDLE_THREAD[0m
select [31mCONFIG_GENERIC_TIME_VSYSCALL[0m
select [31mCONFIG_GUP_GET_PTE_LOW_HIGH[0m if [31mCONFIG_CPU_MIPS32[0m && [31mCONFIG_PHYS_ADDR_T_64BIT[0m
select [31mCONFIG_HANDLE_DOMAIN_IRQ[0m
select [31mCONFIG_HAVE_ARCH_COMPILER_H[0m
select [31mCONFIG_HAVE_ARCH_JUMP_LABEL[0m
select [31mCONFIG_HAVE_ARCH_KGDB[0m
select [31mCONFIG_HAVE_ARCH_MMAP_RND_BITS[0m if [31mCONFIG_MMU[0m
select [31mCONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS[0m if [31mCONFIG_MMU[0m && [31mCONFIG_COMPAT[0m
select [31mCONFIG_HAVE_ARCH_SECCOMP_FILTER[0m
select [31mCONFIG_HAVE_ARCH_TRACEHOOK[0m
select [31mCONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE[0m if [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_HAVE_ASM_MODVERSIONS[0m
select [31mCONFIG_HAVE_EBPF_JIT[0m if (![31mCONFIG_CPU_MICROMIPS[0m)
select [31mCONFIG_HAVE_CONTEXT_TRACKING[0m
select [31mCONFIG_HAVE_COPY_THREAD_TLS[0m
select [31mCONFIG_HAVE_C_RECORDMCOUNT[0m
select [31mCONFIG_HAVE_DEBUG_KMEMLEAK[0m
select [31mCONFIG_HAVE_DEBUG_STACKOVERFLOW[0m
select [31mCONFIG_HAVE_DMA_CONTIGUOUS[0m
select [31mCONFIG_HAVE_DYNAMIC_FTRACE[0m
select [31mCONFIG_HAVE_EXIT_THREAD[0m
select [31mCONFIG_HAVE_FAST_GUP[0m
select [31mCONFIG_HAVE_FTRACE_MCOUNT_RECORD[0m
select [31mCONFIG_HAVE_FUNCTION_GRAPH_TRACER[0m
select [31mCONFIG_HAVE_FUNCTION_TRACER[0m
select [31mCONFIG_HAVE_IDE[0m
select [31mCONFIG_HAVE_IOREMAP_PROT[0m
select [31mCONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK[0m
select [31mCONFIG_HAVE_IRQ_TIME_ACCOUNTING[0m
select [31mCONFIG_HAVE_KPROBES[0m
select [31mCONFIG_HAVE_KRETPROBES[0m
select [31mCONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION[0m
select [31mCONFIG_HAVE_MEMBLOCK_NODE_MAP[0m
select [31mCONFIG_HAVE_MOD_ARCH_SPECIFIC[0m
select [31mCONFIG_HAVE_NMI[0m
select [31mCONFIG_HAVE_OPROFILE[0m
select [31mCONFIG_HAVE_PERF_EVENTS[0m
select [31mCONFIG_HAVE_REGS_AND_STACK_ACCESS_API[0m
select [31mCONFIG_HAVE_RSEQ[0m
select [31mCONFIG_HAVE_STACKPROTECTOR[0m
select [31mCONFIG_HAVE_SYSCALL_TRACEPOINTS[0m
select [31mCONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN[0m if [31mCONFIG_64BIT[0m || ![31mCONFIG_SMP[0m
select [31mCONFIG_HAVE_GENERIC_VDSO[0m
select [31mCONFIG_IRQ_FORCED_THREADING[0m
select [31mCONFIG_ISA[0m if [31mCONFIG_EISA[0m
select [31mCONFIG_MODULES_USE_ELF_RELA[0m if [31mCONFIG_MODULES[0m && [31mCONFIG_64BIT[0m
select [31mCONFIG_MODULES_USE_ELF_REL[0m if [31mCONFIG_MODULES[0m
select [31mCONFIG_PERF_USE_VMALLOC[0m
select [31mCONFIG_RTC_LIB[0m
select [31mCONFIG_SYSCTL_EXCEPTION_TRACE[0m
select [31mCONFIG_VIRT_TO_BUS[0m
select [31mCONFIG_ARCH_HAS_PTE_SPECIAL[0m if !([31mCONFIG_32BIT[0m && [31mCONFIG_CPU_HAS_RIXI[0m)
menu "Machine selection"
choice
prompt "System type"
default [31mCONFIG_MIPS_GENERIC[0m
config [31mCONFIG_MIPS_GENERIC[0m
bool "Generic board-agnostic MIPS kernel"
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_BUILTIN_DTB[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CLKSRC_MIPS_GIC[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_VI[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_EI[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_PERDEV_COHERENT[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_LIBFDT[0m
select [31mCONFIG_MIPS_AUTO_PFN_OFFSET[0m
select [31mCONFIG_MIPS_CPU_SCACHE[0m
select [31mCONFIG_MIPS_GIC[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
select [31mCONFIG_NO_EXCEPT_FILL[0m
select [31mCONFIG_PCI_DRIVERS_GENERIC[0m
select [31mCONFIG_PINCTRL[0m
select [31mCONFIG_SMP_UP[0m if [31mCONFIG_SMP[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MICROMIPS[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS_CPS[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
select [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m
select [31mCONFIG_SYS_SUPPORTS_SMARTMIPS[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_DESC[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_OHCI_BIG_ENDIAN_DESC[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_OHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_UHCI_BIG_ENDIAN_DESC[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_UHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_UHI_BOOT[0m
help
Select this to build a kernel which aims to support multiple boards,
generally using a flattened device tree passed from the bootloader
using the boot protocol defined in the UHI (Unified Hosting
Interface) specification.
config [31mCONFIG_MIPS_ALCHEMY[0m
bool "Alchemy processor based machines"
select [31mCONFIG_PHYS_ADDR_T_64BIT[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_DMA_MAYBE_COHERENT[0m # Au1000,1500,1100 aren't, rest is
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_APM_EMULATION[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_COMMON_CLK[0m
config [31mCONFIG_AR7[0m
bool "Texas Instruments AR7"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_NO_EXCEPT_FILL[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART16550[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_VLYNQ[0m
select [31mCONFIG_HAVE_CLK[0m
help
Support for the Texas Instruments [31mCONFIG_AR7[0m System-on-a-Chip
family: TNETD7100, 7200 and 7300.
config [31mCONFIG_ATH25[0m
bool "Atheros AR231x/AR531x SoC support"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_IRQ_DOMAIN[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
help
Support for Atheros AR231x and Atheros AR531x based boards
config [31mCONFIG_ATH79[0m
bool "Atheros AR71XX/AR724X/AR913X based boards"
select [31mCONFIG_ARCH_HAS_RESET_CONTROLLER[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_PINCTRL[0m
select [31mCONFIG_HAVE_CLK[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_USB_EHCI_ROOT_HUB_TT[0m if [31mCONFIG_USB_EHCI_HCD_PLATFORM[0m
help
Support for the Atheros AR71XX/AR724X/AR913X SoCs.
config [31mCONFIG_BMIPS_GENERIC[0m
bool "Broadcom Generic BMIPS kernel"
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL[0m
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_NO_EXCEPT_FILL[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_BCM6345_L1_IRQ[0m
select [31mCONFIG_BCM7038_L1_IRQ[0m
select [31mCONFIG_BCM7120_L2_IRQ[0m
select [31mCONFIG_BRCMSTB_L2_IRQ[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_HAS_CPU_BMIPS32_3300[0m
select [31mCONFIG_SYS_HAS_CPU_BMIPS4350[0m
select [31mCONFIG_SYS_HAS_CPU_BMIPS4380[0m
select [31mCONFIG_SYS_HAS_CPU_BMIPS5000[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_DESC[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_OHCI_BIG_ENDIAN_DESC[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_OHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_HARDIRQS_SW_RESEND[0m
help
Build a generic DT-based kernel image that boots on select
BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
must be set appropriately for your board.
config [31mCONFIG_BCM47XX[0m
bool "Broadcom BCM47XX based boards"
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_NO_EXCEPT_FILL[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_USE_GENERIC_EARLY_PRINTK_8250[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_LEDS_GPIO_REGISTER[0m
select [31mCONFIG_BCM47XX_NVRAM[0m
select [31mCONFIG_BCM47XX_SPROM[0m
select [31mCONFIG_BCM47XX_SSB[0m if ![31mCONFIG_BCM47XX_BCMA[0m
help
Support for [31mCONFIG_BCM47XX[0m based boards
config [31mCONFIG_BCM63XX[0m
bool "Broadcom BCM63XX based boards"
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_HAVE_CLK[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_4[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
help
Support for [31mCONFIG_BCM63XX[0m based boards
config [31mCONFIG_MIPS_COBALT[0m
bool "Cobalt Server"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_CEVT_GT641XX[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_FORCE_PCI[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_IRQ_GT641XX[0m
select [31mCONFIG_PCI_GT64XXX_PCI0[0m
select [31mCONFIG_SYS_HAS_CPU_NEVADA[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_USE_GENERIC_EARLY_PRINTK_8250[0m
config [31mCONFIG_MACH_DECSTATION[0m
bool "DECstations"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_CEVT_DS1287[0m
select [31mCONFIG_CEVT_R4K[0m if [31mCONFIG_CPU_R4X00[0m
select [31mCONFIG_CSRC_IOASIC[0m
select [31mCONFIG_CSRC_R4K[0m if [31mCONFIG_CPU_R4X00[0m
select [31mCONFIG_CPU_DADDI_WORKAROUNDS[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_CPU_R4000_WORKAROUNDS[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_CPU_R4400_WORKAROUNDS[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_NO_IOPORT_MAP[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SYS_HAS_CPU_R3000[0m
select [31mCONFIG_SYS_HAS_CPU_R4X00[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_128HZ[0m
select [31mCONFIG_SYS_SUPPORTS_256HZ[0m
select [31mCONFIG_SYS_SUPPORTS_1024HZ[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_4[0m
help
This enables support for DEC's [31mCONFIG_MIPS[0m based workstations. For details
see the Linux/[31mCONFIG_MIPS[0m FAQ on <http://www.linux-mips.org/> and the
DECstation porting pages on <http://decstation.unix-ag.org/>.
If you have one of the following DECstation Models you definitely
want to choose R4xx0 for the CPU Type:
DECstation 5000/50
DECstation 5000/150
DECstation 5000/260
DECsystem 5900/260
otherwise choose R3000.
config [31mCONFIG_MACH_JAZZ[0m
bool "Jazz family of machines"
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_PARPORT[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_SERIO[0m
select [31mCONFIG_FW_ARC[0m
select [31mCONFIG_FW_ARC32[0m
select [31mCONFIG_ARCH_MAY_HAVE_PC_FDC[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DEFAULT_SGI_PARTITION[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_GENERIC_ISA_DMA[0m
select [31mCONFIG_HAVE_PCSPKR_PLATFORM[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_ISA[0m
select [31mCONFIG_SYS_HAS_CPU_R4X00[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_100HZ[0m
help
This a family of machines based on the [31mCONFIG_MIPS[0m R4030 chipset which was
used by several vendors to build RISC/os and Windows NT workstations.
Members include the Acer PICA, [31mCONFIG_MIPS[0m Magnum 4000, [31mCONFIG_MIPS[0m Millennium and
Olivetti M700-10 workstations.
config [31mCONFIG_MACH_INGENIC[0m
bool "Ingenic SoC based machines"
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART16550[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_PINCTRL[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_GENERIC_IRQ_CHIP[0m
select [31mCONFIG_BUILTIN_DTB[0m if [31mCONFIG_MIPS_NO_APPENDED_DTB[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_LIBFDT[0m
config [31mCONFIG_LANTIQ[0m
bool "Lantiq based platforms"
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
select [31mCONFIG_SYS_SUPPORTS_VPE_LOADER[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_PINCTRL[0m
select [31mCONFIG_PINCTRL_LANTIQ[0m
select [31mCONFIG_ARCH_HAS_RESET_CONTROLLER[0m
select [31mCONFIG_RESET_CONTROLLER[0m
config [31mCONFIG_LASAT[0m
bool "LASAT Networks platforms"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CRC32[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_PCI_GT64XXX_PCI0[0m
select [31mCONFIG_MIPS_NILE4[0m
select [31mCONFIG_R5000_CPU_SCACHE[0m
select [31mCONFIG_SYS_HAS_CPU_R5000[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m if [31mCONFIG_BROKEN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
config [31mCONFIG_MACH_LOONGSON32[0m
bool "Loongson-1 family of machines"
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
help
This enables support for the Loongson-1 family of machines.
Loongson-1 is a family of 32-bit [31mCONFIG_MIPS[0m-compatible SoCs developed by
the Institute of Computing Technology (ICT), Chinese Academy of
Sciences (CAS).
config [31mCONFIG_MACH_LOONGSON64[0m
bool "Loongson-2/3 family of machines"
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
help
This enables the support of Loongson-2/3 family of machines.
Loongson-2 is a family of single-core CPUs and Loongson-3 is a
family of multi-core CPUs. They are both 64-bit general-purpose
[31mCONFIG_MIPS[0m-compatible CPUs. Loongson-2/3 are developed by the Institute
of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
in the People's Republic of China. The chief architect is Professor
Weiwu Hu.
config [31mCONFIG_MACH_PISTACHIO[0m
bool "IMG Pistachio SoC based boards"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CLKSRC_MIPS_GIC[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_LIBFDT[0m
select [31mCONFIG_MFD_SYSCON[0m
select [31mCONFIG_MIPS_CPU_SCACHE[0m
select [31mCONFIG_MIPS_GIC[0m
select [31mCONFIG_PINCTRL[0m
select [31mCONFIG_REGULATOR[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS_CPS[0m
select [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
select [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_USE_GENERIC_EARLY_PRINTK_8250[0m
select [31mCONFIG_USE_OF[0m
help
This enables support for the IMG Pistachio SoC platform.
config [31mCONFIG_MIPS_MALTA[0m
bool "MIPS Malta board"
select [31mCONFIG_ARCH_MAY_HAVE_PC_FDC[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_PARPORT[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_SERIO[0m
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_BUILTIN_DTB[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CLKSRC_MIPS_GIC[0m
select [31mCONFIG_COMMON_CLK[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_MAYBE_COHERENT[0m
select [31mCONFIG_GENERIC_ISA_DMA[0m
select [31mCONFIG_HAVE_PCSPKR_PLATFORM[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_LIBFDT[0m
select [31mCONFIG_MIPS_BONITO64[0m
select [31mCONFIG_MIPS_CPU_SCACHE[0m
select [31mCONFIG_MIPS_GIC[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_6[0m
select [31mCONFIG_MIPS_MSC[0m
select [31mCONFIG_PCI_GT64XXX_PCI0[0m
select [31mCONFIG_SMP_UP[0m if [31mCONFIG_SMP[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R3_5[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R5[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m
select [31mCONFIG_SYS_HAS_CPU_NEVADA[0m
select [31mCONFIG_SYS_HAS_CPU_RM7000[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MICROMIPS[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS_CMP[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS_CPS[0m
select [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
select [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m
select [31mCONFIG_SYS_SUPPORTS_SMARTMIPS[0m
select [31mCONFIG_SYS_SUPPORTS_VPE_LOADER[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
help
This enables support for the [31mCONFIG_MIPS[0m Technologies Malta evaluation
board.
config [31mCONFIG_MACH_PIC32[0m
bool "Microchip PIC32 Family"
help
This enables support for the Microchip PIC32 family of platforms.
Microchip PIC32 is a family of general-purpose 32 bit [31mCONFIG_MIPS[0m core
microcontrollers.
config [31mCONFIG_NEC_MARKEINS[0m
bool "NEC EMMA2RH Mark-eins board"
select [31mCONFIG_SOC_EMMA2RH[0m
select [31mCONFIG_HAVE_PCI[0m
help
This enables support for the NEC Electronics Mark-eins boards.
config [31mCONFIG_MACH_VR41XX[0m
bool "NEC VR4100 series based machines"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_SYS_HAS_CPU_VR41XX[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_GPIOLIB[0m
config [31mCONFIG_NXP_STB220[0m
bool "NXP STB220 board"
select [31mCONFIG_SOC_PNX833X[0m
help
Support for NXP Semiconductors STB220 Development Board.
config [31mCONFIG_NXP_STB225[0m
bool "NXP 225 board"
select [31mCONFIG_SOC_PNX833X[0m
select [31mCONFIG_SOC_PNX8335[0m
help
Support for NXP Semiconductors STB225 Development Board.
config [31mCONFIG_PMC_MSP[0m
bool "PMC-Sierra MSP chipsets"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_NO_EXCEPT_FILL[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SERIAL_8250[0m
select [31mCONFIG_SERIAL_8250_CONSOLE[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_MMIO[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_DESC[0m
help
This adds support for the PMC-Sierra family of Multi-Service
Processor System-On-[31mCONFIG_A[0m-Chips. These parts include a number
of integrated peripherals, interfaces and DSPs in addition to
a variety of [31mCONFIG_MIPS[0m cores.
config [31mCONFIG_RALINK[0m
bool "Ralink based machines"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
select [31mCONFIG_ARCH_HAS_RESET_CONTROLLER[0m
select [31mCONFIG_RESET_CONTROLLER[0m
config [31mCONFIG_SGI_IP22[0m
bool "SGI IP22 (Indy/Indigo2)"
select [31mCONFIG_FW_ARC[0m
select [31mCONFIG_FW_ARC32[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_SERIO[0m
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DEFAULT_SGI_PARTITION[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_HAVE_EISA[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_IP22_CPU_SCACHE[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN[0m
select [31mCONFIG_SGI_HAS_I8042[0m
select [31mCONFIG_SGI_HAS_INDYDOG[0m
select [31mCONFIG_SGI_HAS_HAL2[0m
select [31mCONFIG_SGI_HAS_SEEQ[0m
select [31mCONFIG_SGI_HAS_WD93[0m
select [31mCONFIG_SGI_HAS_ZILOG[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_R4X00[0m
select [31mCONFIG_SYS_HAS_CPU_R5000[0m
#
# Disable [31mCONFIG_EARLY_PRINTK[0m for now since it leads to overwritten prom
# memory during early boot on some machines.
#
# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
# for a more details discussion
#
# select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
help
This are the SGI Indy, Challenge S and Indigo2, as well as certain
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
that runs on these, say Y here.
config [31mCONFIG_SGI_IP27[0m
bool "SGI IP27 (Origin200/2000)"
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_FW_ARC[0m
select [31mCONFIG_FW_ARC64[0m
select [31mCONFIG_BOOT_ELF64[0m
select [31mCONFIG_DEFAULT_SGI_PARTITION[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_IRQ_DOMAIN_HIERARCHY[0m
select [31mCONFIG_NR_CPUS_DEFAULT_64[0m
select [31mCONFIG_PCI_DRIVERS_GENERIC[0m
select [31mCONFIG_PCI_XTALK_BRIDGE[0m
select [31mCONFIG_SYS_HAS_CPU_R10000[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_NUMA[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
here.
config [31mCONFIG_SGI_IP28[0m
bool "SGI IP28 (Indigo2 R10k)"
select [31mCONFIG_FW_ARC[0m
select [31mCONFIG_FW_ARC64[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_SERIO[0m
select [31mCONFIG_BOOT_ELF64[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DEFAULT_SGI_PARTITION[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_HAVE_EISA[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_SGI_HAS_I8042[0m
select [31mCONFIG_SGI_HAS_INDYDOG[0m
select [31mCONFIG_SGI_HAS_HAL2[0m
select [31mCONFIG_SGI_HAS_SEEQ[0m
select [31mCONFIG_SGI_HAS_WD93[0m
select [31mCONFIG_SGI_HAS_ZILOG[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_R10000[0m
#
# Disable [31mCONFIG_EARLY_PRINTK[0m for now since it leads to overwritten prom
# memory during early boot on some machines.
#
# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
# for a more details discussion
#
# select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
help
This is the SGI Indigo2 with R10000 processor. To compile a Linux
kernel that runs on these, say Y here.
config [31mCONFIG_SGI_IP32[0m
bool "SGI IP32 (O2)"
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_FW_ARC[0m
select [31mCONFIG_FW_ARC32[0m
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_R5000_CPU_SCACHE[0m
select [31mCONFIG_RM7000_CPU_SCACHE[0m
select [31mCONFIG_SYS_HAS_CPU_R5000[0m
select [31mCONFIG_SYS_HAS_CPU_R10000[0m if [31mCONFIG_BROKEN[0m
select [31mCONFIG_SYS_HAS_CPU_RM7000[0m
select [31mCONFIG_SYS_HAS_CPU_NEVADA[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
help
If you want this kernel to run on SGI O2 workstation, say Y here.
config [31mCONFIG_SIBYTE_CRHINE[0m
bool "Sibyte BCM91120C-CRhine"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_SIBYTE_BCM1120[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
config [31mCONFIG_SIBYTE_CARMEL[0m
bool "Sibyte BCM91120x-Carmel"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_SIBYTE_BCM1120[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
config [31mCONFIG_SIBYTE_CRHONE[0m
bool "Sibyte BCM91125C-CRhone"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_SIBYTE_BCM1125[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
config [31mCONFIG_SIBYTE_RHONE[0m
bool "Sibyte BCM91125E-Rhone"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_SIBYTE_BCM1125H[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
config [31mCONFIG_SIBYTE_SWARM[0m
bool "Sibyte BCM91250A-SWARM"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_HAVE_PATA_PLATFORM[0m
select [31mCONFIG_SIBYTE_SB1250[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_SWIOTLB[0m if [31mCONFIG_ARCH_DMA_ADDR_T_64BIT[0m && [31mCONFIG_PCI[0m
config [31mCONFIG_SIBYTE_LITTLESUR[0m
bool "Sibyte BCM91250C2-LittleSur"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_HAVE_PATA_PLATFORM[0m
select [31mCONFIG_SIBYTE_SB1250[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
config [31mCONFIG_SIBYTE_SENTOSA[0m
bool "Sibyte BCM91250E-Sentosa"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_SIBYTE_SB1250[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SWIOTLB[0m if [31mCONFIG_ARCH_DMA_ADDR_T_64BIT[0m && [31mCONFIG_PCI[0m
config [31mCONFIG_SIBYTE_BIGSUR[0m
bool "Sibyte BCM91480B-BigSur"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_NR_CPUS_DEFAULT_4[0m
select [31mCONFIG_SIBYTE_BCM1x80[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_SWIOTLB[0m if [31mCONFIG_ARCH_DMA_ADDR_T_64BIT[0m && [31mCONFIG_PCI[0m
config [31mCONFIG_SNI_RM[0m
bool "SNI RM200/300/400"
select [31mCONFIG_FW_ARC[0m if [31mCONFIG_CPU_LITTLE_ENDIAN[0m
select [31mCONFIG_FW_ARC32[0m if [31mCONFIG_CPU_LITTLE_ENDIAN[0m
select [31mCONFIG_FW_SNIPROM[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_ARCH_MAY_HAVE_PC_FDC[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_PARPORT[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_SERIO[0m
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DEFAULT_SGI_PARTITION[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_GENERIC_ISA_DMA[0m
select [31mCONFIG_HAVE_EISA[0m
select [31mCONFIG_HAVE_PCSPKR_PLATFORM[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_I8253[0m
select [31mCONFIG_I8259[0m
select [31mCONFIG_ISA[0m
select [31mCONFIG_SWAP_IO_SPACE[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_SYS_HAS_CPU_R4X00[0m
select [31mCONFIG_SYS_HAS_CPU_R5000[0m
select [31mCONFIG_SYS_HAS_CPU_R10000[0m
select [31mCONFIG_R5000_CPU_SCACHE[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
help
The SNI RM200/300/400 are [31mCONFIG_MIPS[0m-based machines manufactured by
Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
config [31mCONFIG_MACH_TX39XX[0m
bool "Toshiba TX39 series based machines"
config [31mCONFIG_MACH_TX49XX[0m
bool "Toshiba TX49 series based machines"
config [31mCONFIG_MIKROTIK_RB532[0m
bool "Mikrotik RB532 boards"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_BOOT_RAW[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_4[0m
help
Support the Mikrotik(tm) RouterBoard 532 series,
based on the IDT RC32434 SoC.
config [31mCONFIG_CAVIUM_OCTEON_SOC[0m
bool "Cavium Networks Octeon SoC based boards"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_HAVE_RAPIDIO[0m
select [31mCONFIG_PHYS_ADDR_T_64BIT[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_EDAC_SUPPORT[0m
select [31mCONFIG_EDAC_ATOMIC_SCRUB[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_HAS_CPU_CAVIUM_OCTEON[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_ZONE_DMA32[0m
select [31mCONFIG_HOLES_IN_ZONE[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_LIBFDT[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_NR_CPUS_DEFAULT_64[0m
select [31mCONFIG_MIPS_NR_CPU_NR_MAP_1024[0m
select [31mCONFIG_BUILTIN_DTB[0m
select [31mCONFIG_MTD_COMPLEX_MAPPINGS[0m
select [31mCONFIG_SWIOTLB[0m
select [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m
help
This option supports all of the Octeon reference boards from Cavium
Networks. It builds a kernel that dynamically determines the Octeon
CPU type and supports all known board reference implementations.
Some of the supported boards are:
EBT3000
EBH3000
EBH3100
Thunder
Kodama
Hikari
Say Y here for most Octeon reference boards.
config [31mCONFIG_NLM_XLR_BOARD[0m
bool "Netlogic XLR/XLS based systems"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_NLM_COMMON[0m
select [31mCONFIG_SYS_HAS_CPU_XLR[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_PHYS_ADDR_T_64BIT[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_NR_CPUS_DEFAULT_32[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART16550[0m
help
Support for systems based on Netlogic XLR and XLS processors.
Say Y here if you have a XLR or XLS based board.
config [31mCONFIG_NLM_XLP_BOARD[0m
bool "Netlogic XLP based systems"
select [31mCONFIG_BOOT_ELF32[0m
select [31mCONFIG_NLM_COMMON[0m
select [31mCONFIG_SYS_HAS_CPU_XLP[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_PHYS_ADDR_T_64BIT[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_NR_CPUS_DEFAULT_32[0m
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_ZONE_DMA32[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_USE_OF[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
select [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART16550[0m
help
This board is based on Netlogic XLP Processor.
Say Y here if you have a XLP based board.
config [31mCONFIG_MIPS_PARAVIRT[0m
bool "Para-Virtualized guest system"
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_NR_CPUS_DEFAULT_4[0m
select [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m
select [31mCONFIG_SYS_HAS_CPU_CAVIUM_OCTEON[0m
select [31mCONFIG_HAVE_PCI[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
help
This option supports guest running under ????
endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/ath25/Kconfig"
source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm47xx/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/bmips/Kconfig"
source "arch/mips/generic/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/jz4740/Kconfig"
source "arch/mips/lantiq/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pic32/Kconfig"
source "arch/mips/pistachio/Kconfig"
source "arch/mips/pmcs-msp71xx/Kconfig"
source "arch/mips/ralink/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
source "arch/mips/cavium-octeon/Kconfig"
source "arch/mips/loongson32/Kconfig"
source "arch/mips/loongson64/Kconfig"
source "arch/mips/netlogic/Kconfig"
source "arch/mips/paravirt/Kconfig"
endmenu
config [31mCONFIG_GENERIC_HWEIGHT[0m
bool
default y
config [31mCONFIG_GENERIC_CALIBRATE_DELAY[0m
bool
default y
config [31mCONFIG_SCHED_OMIT_FRAME_POINTER[0m
bool
default y
#
# Select some configuration options automatically based on user selections.
#
config [31mCONFIG_FW_ARC[0m
bool
config [31mCONFIG_ARCH_MAY_HAVE_PC_FDC[0m
bool
config [31mCONFIG_BOOT_RAW[0m
bool
config [31mCONFIG_CEVT_BCM1480[0m
bool
config [31mCONFIG_CEVT_DS1287[0m
bool
config [31mCONFIG_CEVT_GT641XX[0m
bool
config [31mCONFIG_CEVT_R4K[0m
bool
config [31mCONFIG_CEVT_SB1250[0m
bool
config [31mCONFIG_CEVT_TXX9[0m
bool
config [31mCONFIG_CSRC_BCM1480[0m
bool
config [31mCONFIG_CSRC_IOASIC[0m
bool
config [31mCONFIG_CSRC_R4K[0m
bool
config [31mCONFIG_CSRC_SB1250[0m
bool
config [31mCONFIG_MIPS_CLOCK_VSYSCALL[0m
def_bool [31mCONFIG_CSRC_R4K[0m || [31mCONFIG_CLKSRC_MIPS_GIC[0m
config [31mCONFIG_GPIO_TXX9[0m
select [31mCONFIG_GPIOLIB[0m
bool
config [31mCONFIG_FW_CFE[0m
bool
config [31mCONFIG_ARCH_SUPPORTS_UPROBES[0m
bool
config [31mCONFIG_DMA_MAYBE_COHERENT[0m
select [31mCONFIG_ARCH_HAS_DMA_COHERENCE_H[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
bool
config [31mCONFIG_DMA_PERDEV_COHERENT[0m
bool
select [31mCONFIG_ARCH_HAS_SETUP_DMA_OPS[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
config [31mCONFIG_DMA_NONCOHERENT[0m
bool
#
# [31mCONFIG_MIPS[0m allows mixing "slightly different" Cacheability and Coherency
# Attribute bits. It is believed that the uncached access through
# KSEG1 and the implementation specific "uncached accelerated" used
# by pgprot_writcombine can be mixed, and the latter sometimes provides
# significant advantages.
#
select [31mCONFIG_ARCH_HAS_DMA_WRITE_COMBINE[0m
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE[0m
select [31mCONFIG_ARCH_HAS_UNCACHED_SEGMENT[0m
select [31mCONFIG_NEED_DMA_MAP_STATE[0m
select [31mCONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN[0m
select [31mCONFIG_DMA_NONCOHERENT_CACHE_SYNC[0m
config [31mCONFIG_SYS_HAS_EARLY_PRINTK[0m
bool
config [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
bool
config [31mCONFIG_MIPS_BONITO64[0m
bool
config [31mCONFIG_MIPS_MSC[0m
bool
config [31mCONFIG_MIPS_NILE4[0m
bool
config [31mCONFIG_SYNC_R4K[0m
bool
config [31mCONFIG_MIPS_MACHINE[0m
def_bool n
config [31mCONFIG_NO_IOPORT_MAP[0m
def_bool n
config [31mCONFIG_GENERIC_CSUM[0m
bool
default y if ![31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
config [31mCONFIG_GENERIC_ISA_DMA[0m
bool
select [31mCONFIG_ZONE_DMA[0m if [31mCONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN[0m=n
select [31mCONFIG_ISA_DMA_API[0m
config [31mCONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN[0m
bool
select [31mCONFIG_GENERIC_ISA_DMA[0m
config [31mCONFIG_ISA_DMA_API[0m
bool
config [31mCONFIG_HOLES_IN_ZONE[0m
bool
config [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m
bool
help
Selected if the platform supports relocating the kernel.
The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
to allow access to command line and entropy sources.
config [31mCONFIG_MIPS_CBPF_JIT[0m
def_bool y
depends on [31mCONFIG_BPF_JIT[0m && [31mCONFIG_HAVE_CBPF_JIT[0m
config [31mCONFIG_MIPS_EBPF_JIT[0m
def_bool y
depends on [31mCONFIG_BPF_JIT[0m && [31mCONFIG_HAVE_EBPF_JIT[0m
#
# Endianness selection. Sufficiently obscure so many users don't know what to
# answer,so we try hard to limit the available choices. Also the use of a
# choice statement should be more obvious to the user.
#
choice
prompt "Endianness selection"
help
Some [31mCONFIG_MIPS[0m machines can be configured for either little or big endian
byte order. These modes require different kernels and a different
Linux distribution. In general there is one preferred byteorder for a
particular system but some systems are just as commonly used in the
one or the other endianness.
config [31mCONFIG_CPU_BIG_ENDIAN[0m
bool "Big endian"
depends on [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
config [31mCONFIG_CPU_LITTLE_ENDIAN[0m
bool "Little endian"
depends on [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
endchoice
config [31mCONFIG_EXPORT_UASM[0m
bool
config [31mCONFIG_SYS_SUPPORTS_APM_EMULATION[0m
bool
config [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
bool
config [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
bool
config [31mCONFIG_SYS_SUPPORTS_HUGETLBFS[0m
bool
depends on [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
default y
config [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m
def_bool [31mCONFIG_HUGETLB_PAGE[0m || [31mCONFIG_TRANSPARENT_HUGEPAGE[0m
config [31mCONFIG_IRQ_CPU_RM7K[0m
bool
config [31mCONFIG_IRQ_MSP_SLP[0m
bool
config [31mCONFIG_IRQ_MSP_CIC[0m
bool
config [31mCONFIG_IRQ_TXX9[0m
bool
config [31mCONFIG_IRQ_GT641XX[0m
bool
config [31mCONFIG_PCI_GT64XXX_PCI0[0m
bool
config [31mCONFIG_PCI_XTALK_BRIDGE[0m
bool
config [31mCONFIG_NO_EXCEPT_FILL[0m
bool
config [31mCONFIG_SOC_EMMA2RH[0m
bool
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_SYS_HAS_CPU_R5500[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
config [31mCONFIG_SOC_PNX833X[0m
bool
select [31mCONFIG_CEVT_R4K[0m
select [31mCONFIG_CSRC_R4K[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_SYS_SUPPORTS_LITTLE_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_BIG_ENDIAN[0m
select [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_VI[0m
config [31mCONFIG_SOC_PNX8335[0m
bool
select [31mCONFIG_SOC_PNX833X[0m
config [31mCONFIG_MIPS_SPRAM[0m
bool
config [31mCONFIG_SWAP_IO_SPACE[0m
bool
config [31mCONFIG_SGI_HAS_INDYDOG[0m
bool
config [31mCONFIG_SGI_HAS_HAL2[0m
bool
config [31mCONFIG_SGI_HAS_SEEQ[0m
bool
config [31mCONFIG_SGI_HAS_WD93[0m
bool
config [31mCONFIG_SGI_HAS_ZILOG[0m
bool
config [31mCONFIG_SGI_HAS_I8042[0m
bool
config [31mCONFIG_DEFAULT_SGI_PARTITION[0m
bool
config [31mCONFIG_FW_ARC32[0m
bool
config [31mCONFIG_FW_SNIPROM[0m
bool
config [31mCONFIG_BOOT_ELF32[0m
bool
config [31mCONFIG_MIPS_L1_CACHE_SHIFT_4[0m
bool
config [31mCONFIG_MIPS_L1_CACHE_SHIFT_5[0m
bool
config [31mCONFIG_MIPS_L1_CACHE_SHIFT_6[0m
bool
config [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
bool
config [31mCONFIG_MIPS_L1_CACHE_SHIFT[0m
int
default "7" if [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
default "6" if [31mCONFIG_MIPS_L1_CACHE_SHIFT_6[0m
default "5" if [31mCONFIG_MIPS_L1_CACHE_SHIFT_5[0m
default "4" if [31mCONFIG_MIPS_L1_CACHE_SHIFT_4[0m
default "5"
config [31mCONFIG_HAVE_STD_PC_SERIAL_PORT[0m
bool
config [31mCONFIG_ARC_CONSOLE[0m
bool "ARC console support"
depends on [31mCONFIG_SGI_IP22[0m || [31mCONFIG_SGI_IP28[0m || ([31mCONFIG_SNI_RM[0m && [31mCONFIG_CPU_LITTLE_ENDIAN[0m)
config [31mCONFIG_ARC_MEMORY[0m
bool
depends on [31mCONFIG_MACH_JAZZ[0m || [31mCONFIG_SNI_RM[0m || [31mCONFIG_SGI_IP32[0m
default y
config [31mCONFIG_ARC_PROMLIB[0m
bool
depends on [31mCONFIG_MACH_JAZZ[0m || [31mCONFIG_SNI_RM[0m || [31mCONFIG_SGI_IP22[0m || [31mCONFIG_SGI_IP28[0m || [31mCONFIG_SGI_IP32[0m
default y
config [31mCONFIG_FW_ARC64[0m
bool
config [31mCONFIG_BOOT_ELF64[0m
bool
menu "CPU selection"
choice
prompt "CPU type"
default [31mCONFIG_CPU_R4X00[0m
config [31mCONFIG_CPU_LOONGSON3[0m
bool "Loongson 3 CPU"
depends on [31mCONFIG_SYS_HAS_CPU_LOONGSON3[0m
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_WEAK_ORDERING[0m
select [31mCONFIG_WEAK_REORDERING_BEYOND_LLSC[0m
select [31mCONFIG_MIPS_PGD_C0_CONTEXT[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_6[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_SWIOTLB[0m
help
The Loongson 3 processor implements the MIPS64R2 instruction
set with many extensions.
config [31mCONFIG_LOONGSON3_ENHANCEMENT[0m
bool "New Loongson 3 CPU Enhancements"
default n
select [31mCONFIG_CPU_MIPSR2[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
depends on [31mCONFIG_CPU_LOONGSON3[0m
help
New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
Fast TLB refill support, etc.
This option enable those enhancements which are not probed at run
time. If you want a generic kernel to run on all Loongson 3 machines,
please say 'N' here. If you want a high-performance kernel to run on
new Loongson 3 machines only, please say 'Y' here.
config [31mCONFIG_CPU_LOONGSON3_WORKAROUNDS[0m
bool "Old Loongson 3 LLSC Workarounds"
default y if [31mCONFIG_SMP[0m
depends on [31mCONFIG_CPU_LOONGSON3[0m
help
Loongson 3 processors have the llsc issues which require workarounds.
Without workarounds the system may hang unexpectedly.
Newer Loongson 3 will fix these issues and no workarounds are needed.
The workarounds have no significant side effect on them but may
decrease the performance of the system so this option should be
disabled unless the kernel is intended to be run on old systems.
If unsure, please say Y.
config [31mCONFIG_CPU_LOONGSON2E[0m
bool "Loongson 2E"
depends on [31mCONFIG_SYS_HAS_CPU_LOONGSON2E[0m
select [31mCONFIG_CPU_LOONGSON2[0m
help
The Loongson 2E processor implements the [31mCONFIG_MIPS[0m III instruction set
with many extensions.
It has an internal [31mCONFIG_FPGA[0m northbridge, which is compatible to
bonito64.
config [31mCONFIG_CPU_LOONGSON2F[0m
bool "Loongson 2F"
depends on [31mCONFIG_SYS_HAS_CPU_LOONGSON2F[0m
select [31mCONFIG_CPU_LOONGSON2[0m
select [31mCONFIG_GPIOLIB[0m
help
The Loongson 2F processor implements the [31mCONFIG_MIPS[0m III instruction set
with many extensions.
Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
have a similar programming interface with [31mCONFIG_FPGA[0m northbridge used in
Loongson2E.
config [31mCONFIG_CPU_LOONGSON1B[0m
bool "Loongson 1B"
depends on [31mCONFIG_SYS_HAS_CPU_LOONGSON1B[0m
select [31mCONFIG_CPU_LOONGSON1[0m
select [31mCONFIG_LEDS_GPIO_REGISTER[0m
help
The Loongson 1B is a 32-bit SoC, which implements the MIPS32
Release 1 instruction set and part of the MIPS32 Release 2
instruction set.
config [31mCONFIG_CPU_LOONGSON1C[0m
bool "Loongson 1C"
depends on [31mCONFIG_SYS_HAS_CPU_LOONGSON1C[0m
select [31mCONFIG_CPU_LOONGSON1[0m
select [31mCONFIG_LEDS_GPIO_REGISTER[0m
help
The Loongson 1C is a 32-bit SoC, which implements the MIPS32
Release 1 instruction set and part of the MIPS32 Release 2
instruction set.
config [31mCONFIG_CPU_MIPS32_R1[0m
bool "MIPS32 Release 1"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
help
Choose this option to build a kernel for release 1 or later of the
MIPS32 architecture. Most modern embedded systems with a 32-bit
[31mCONFIG_MIPS[0m processor are based on a MIPS32 processor. If you know the
specific type of processor in your system, choose those that one
otherwise [31mCONFIG_CPU_MIPS32_R1[0m is a safe bet for any MIPS32 system.
Release 2 of the MIPS32 architecture is available since several
years so chances are you even have a MIPS32 Release 2 processor
in which case you should choose [31mCONFIG_CPU_MIPS32_R2[0m instead for better
performance.
config [31mCONFIG_CPU_MIPS32_R2[0m
bool "MIPS32 Release 2"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_MSA[0m
select [31mCONFIG_HAVE_KVM[0m
help
Choose this option to build a kernel for release 2 or later of the
MIPS32 architecture. Most modern embedded systems with a 32-bit
[31mCONFIG_MIPS[0m processor are based on a MIPS32 processor. If you know the
specific type of processor in your system, choose those that one
otherwise [31mCONFIG_CPU_MIPS32_R1[0m is a safe bet for any MIPS32 system.
config [31mCONFIG_CPU_MIPS32_R6[0m
bool "MIPS32 Release 6"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_MSA[0m
select [31mCONFIG_HAVE_KVM[0m
select [31mCONFIG_MIPS_O32_FP64_SUPPORT[0m
help
Choose this option to build a kernel for release 6 or later of the
MIPS32 architecture. New [31mCONFIG_MIPS[0m processors, starting with the Warrior
family, are based on a MIPS32r6 processor. If you own an older
processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
config [31mCONFIG_CPU_MIPS64_R1[0m
bool "MIPS64 Release 1"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS64_R1[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
help
Choose this option to build a kernel for release 1 or later of the
MIPS64 architecture. Many modern embedded systems with a 64-bit
[31mCONFIG_MIPS[0m processor are based on a MIPS64 processor. If you know the
specific type of processor in your system, choose those that one
otherwise [31mCONFIG_CPU_MIPS64_R1[0m is a safe bet for any MIPS64 system.
Release 2 of the MIPS64 architecture is available since several
years so chances are you even have a MIPS64 Release 2 processor
in which case you should choose [31mCONFIG_CPU_MIPS64_R2[0m instead for better
performance.
config [31mCONFIG_CPU_MIPS64_R2[0m
bool "MIPS64 Release 2"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_SUPPORTS_MSA[0m
select [31mCONFIG_HAVE_KVM[0m
help
Choose this option to build a kernel for release 2 or later of the
MIPS64 architecture. Many modern embedded systems with a 64-bit
[31mCONFIG_MIPS[0m processor are based on a MIPS64 processor. If you know the
specific type of processor in your system, choose those that one
otherwise [31mCONFIG_CPU_MIPS64_R1[0m is a safe bet for any MIPS64 system.
config [31mCONFIG_CPU_MIPS64_R6[0m
bool "MIPS64 Release 6"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_SUPPORTS_MSA[0m
select [31mCONFIG_MIPS_O32_FP64_SUPPORT[0m if [31mCONFIG_32BIT[0m || [31mCONFIG_MIPS32_O32[0m
select [31mCONFIG_HAVE_KVM[0m
help
Choose this option to build a kernel for release 6 or later of the
MIPS64 architecture. New [31mCONFIG_MIPS[0m processors, starting with the Warrior
family, are based on a MIPS64r6 processor. If you own an older
processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
config [31mCONFIG_CPU_R3000[0m
bool "R3000"
depends on [31mCONFIG_SYS_HAS_CPU_R3000[0m
select [31mCONFIG_CPU_HAS_WB[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_R3K_TLB[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
help
Please make sure to pick the right CPU type. Linux/[31mCONFIG_MIPS[0m is not
designed to be generic, i.e. Kernels compiled for R3000 CPUs will
*not* work on R4000 machines and vice versa. However, since most
of the supported machines have an R4000 (or similar) CPU, R4x00
might be a safe bet. If the resulting kernel does not work,
try to recompile with R3000.
config [31mCONFIG_CPU_TX39XX[0m
bool "R39XX"
depends on [31mCONFIG_SYS_HAS_CPU_TX39XX[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_R3K_TLB[0m
config [31mCONFIG_CPU_VR41XX[0m
bool "R41xx"
depends on [31mCONFIG_SYS_HAS_CPU_VR41XX[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
help
The options selects support for the NEC VR4100 series of processors.
Only choose this option if you have one of these processors as a
kernel built with this option will not run on any other type of
processor or vice versa.
config [31mCONFIG_CPU_R4X00[0m
bool "R4x00"
depends on [31mCONFIG_SYS_HAS_CPU_R4X00[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
help
[31mCONFIG_MIPS[0m Technologies R4000-series processors other than 4300, including
the R4000, R4400, R4600, and 4700.
config [31mCONFIG_CPU_TX49XX[0m
bool "R49XX"
depends on [31mCONFIG_SYS_HAS_CPU_TX49XX[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
config [31mCONFIG_CPU_R5000[0m
bool "R5000"
depends on [31mCONFIG_SYS_HAS_CPU_R5000[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
help
[31mCONFIG_MIPS[0m Technologies R5000-series processors other than the Nevada.
config [31mCONFIG_CPU_R5500[0m
bool "R5500"
depends on [31mCONFIG_SYS_HAS_CPU_R5500[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
help
NEC VR5500 and VR5500A series processors implement 64-bit [31mCONFIG_MIPS[0m IV
instruction set.
config [31mCONFIG_CPU_NEVADA[0m
bool "RM52xx"
depends on [31mCONFIG_SYS_HAS_CPU_NEVADA[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
help
[31mCONFIG_QED[0m / PMC-Sierra RM52xx-series ("Nevada") processors.
config [31mCONFIG_CPU_R10000[0m
bool "R10000"
depends on [31mCONFIG_SYS_HAS_CPU_R10000[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
help
[31mCONFIG_MIPS[0m Technologies R10000-series processors.
config [31mCONFIG_CPU_RM7000[0m
bool "RM7000"
depends on [31mCONFIG_SYS_HAS_CPU_RM7000[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
config [31mCONFIG_CPU_SB1[0m
bool "SB1"
depends on [31mCONFIG_SYS_HAS_CPU_SB1[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_WEAK_ORDERING[0m
config [31mCONFIG_CPU_CAVIUM_OCTEON[0m
bool "Cavium Octeon processor"
depends on [31mCONFIG_SYS_HAS_CPU_CAVIUM_OCTEON[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_WEAK_ORDERING[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_USB_EHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_USB_OHCI_BIG_ENDIAN_MMIO[0m if [31mCONFIG_CPU_BIG_ENDIAN[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
select [31mCONFIG_HAVE_KVM[0m
help
The Cavium Octeon processor is a highly integrated chip containing
many ethernet hardware widgets for networking tasks. The processor
can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
Full details can be found at http://www.caviumnetworks.com.
config [31mCONFIG_CPU_BMIPS[0m
bool "Broadcom BMIPS"
depends on [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
select [31mCONFIG_CPU_MIPS32[0m
select [31mCONFIG_CPU_BMIPS32_3300[0m if [31mCONFIG_SYS_HAS_CPU_BMIPS32_3300[0m
select [31mCONFIG_CPU_BMIPS4350[0m if [31mCONFIG_SYS_HAS_CPU_BMIPS4350[0m
select [31mCONFIG_CPU_BMIPS4380[0m if [31mCONFIG_SYS_HAS_CPU_BMIPS4380[0m
select [31mCONFIG_CPU_BMIPS5000[0m if [31mCONFIG_SYS_HAS_CPU_BMIPS5000[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_DMA_NONCOHERENT[0m
select [31mCONFIG_IRQ_MIPS_CPU[0m
select [31mCONFIG_SWAP_IO_SPACE[0m
select [31mCONFIG_WEAK_ORDERING[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m
select [31mCONFIG_MIPS_EXTERNAL_TIMER[0m
help
Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
config [31mCONFIG_CPU_XLR[0m
bool "Netlogic XLR SoC"
depends on [31mCONFIG_SYS_HAS_CPU_XLR[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_WEAK_ORDERING[0m
select [31mCONFIG_WEAK_REORDERING_BEYOND_LLSC[0m
help
Netlogic Microsystems XLR/XLS processors.
config [31mCONFIG_CPU_XLP[0m
bool "Netlogic XLP SoC"
depends on [31mCONFIG_SYS_HAS_CPU_XLP[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_WEAK_ORDERING[0m
select [31mCONFIG_WEAK_REORDERING_BEYOND_LLSC[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_MIPSR2[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_MIPS_ASID_BITS_VARIABLE[0m
help
Netlogic Microsystems XLP processors.
endchoice
config [31mCONFIG_CPU_MIPS32_3_5_FEATURES[0m
bool "MIPS32 Release 3.5 Features"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS32_R3_5[0m
depends on [31mCONFIG_CPU_MIPS32_R2[0m || [31mCONFIG_CPU_MIPS32_R6[0m
help
Choose this option to build a kernel for release 2 or later of the
MIPS32 architecture including features from the 3.5 release such as
support for Enhanced Virtual Addressing ([31mCONFIG_EVA[0m).
config [31mCONFIG_CPU_MIPS32_3_5_EVA[0m
bool "Enhanced Virtual Addressing (EVA)"
depends on [31mCONFIG_CPU_MIPS32_3_5_FEATURES[0m
select [31mCONFIG_EVA[0m
default y
help
Choose this option if you want to enable the Enhanced Virtual
Addressing ([31mCONFIG_EVA[0m) on your MIPS32 core (such as proAptiv).
One of its primary benefits is an increase in the maximum size
of lowmem (up to 3GB). If unsure, say 'N' here.
config [31mCONFIG_CPU_MIPS32_R5_FEATURES[0m
bool "MIPS32 Release 5 Features"
depends on [31mCONFIG_SYS_HAS_CPU_MIPS32_R5[0m
depends on [31mCONFIG_CPU_MIPS32_R2[0m
help
Choose this option to build a kernel for release 2 or later of the
MIPS32 architecture including features from release 5 such as
support for Extended Physical Addressing ([31mCONFIG_XPA[0m).
config [31mCONFIG_CPU_MIPS32_R5_XPA[0m
bool "Extended Physical Addressing (XPA)"
depends on [31mCONFIG_CPU_MIPS32_R5_FEATURES[0m
depends on ![31mCONFIG_EVA[0m
depends on ![31mCONFIG_PAGE_SIZE_4KB[0m
depends on [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_XPA[0m
select [31mCONFIG_HIGHMEM[0m
select [31mCONFIG_PHYS_ADDR_T_64BIT[0m
default n
help
Choose this option if you want to enable the Extended Physical
Addressing ([31mCONFIG_XPA[0m) on your MIPS32 core (such as P5600 series). The
benefit is to increase physical addressing equal to or greater
than 40 bits. Note that this has the side effect of turning on
64-bit addressing which in turn makes the PTEs 64-bit in size.
If unsure, say 'N' here.
if [31mCONFIG_CPU_LOONGSON2F[0m
config [31mCONFIG_CPU_NOP_WORKAROUNDS[0m
bool
config [31mCONFIG_CPU_JUMP_WORKAROUNDS[0m
bool
config [31mCONFIG_CPU_LOONGSON2F_WORKAROUNDS[0m
bool "Loongson 2F Workarounds"
default y
select [31mCONFIG_CPU_NOP_WORKAROUNDS[0m
select [31mCONFIG_CPU_JUMP_WORKAROUNDS[0m
help
Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
require workarounds. Without workarounds the system may hang
unexpectedly. For more information please refer to the gas
-mfix-loongson2f-nop and -mfix-loongson2f-jump options.
Loongson 2F03 and later have fixed these issues and no workarounds
are needed. The workarounds have no significant side effect on them
but may decrease the performance of the system so this option should
be disabled unless the kernel is intended to be run on 2F01 or 2F02
systems.
If unsure, please say Y.
endif # [31mCONFIG_CPU_LOONGSON2F[0m
config [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
bool
select [31mCONFIG_HAVE_KERNEL_GZIP[0m
select [31mCONFIG_HAVE_KERNEL_BZIP2[0m
select [31mCONFIG_HAVE_KERNEL_LZ4[0m
select [31mCONFIG_HAVE_KERNEL_LZMA[0m
select [31mCONFIG_HAVE_KERNEL_LZO[0m
select [31mCONFIG_HAVE_KERNEL_XZ[0m
config [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART16550[0m
bool
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
config [31mCONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM[0m
bool
select [31mCONFIG_SYS_SUPPORTS_ZBOOT[0m
config [31mCONFIG_CPU_LOONGSON2[0m
bool
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
select [31mCONFIG_ARCH_HAS_PHYS_TO_DMA[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
config [31mCONFIG_CPU_LOONGSON1[0m
bool
select [31mCONFIG_CPU_MIPS32[0m
select [31mCONFIG_CPU_MIPSR2[0m
select [31mCONFIG_CPU_HAS_PREFETCH[0m
select [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
select [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
select [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m
config [31mCONFIG_CPU_BMIPS32_3300[0m
select [31mCONFIG_SMP_UP[0m if [31mCONFIG_SMP[0m
bool
config [31mCONFIG_CPU_BMIPS4350[0m
bool
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
config [31mCONFIG_CPU_BMIPS4380[0m
bool
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_6[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
select [31mCONFIG_CPU_HAS_RIXI[0m
config [31mCONFIG_CPU_BMIPS5000[0m
bool
select [31mCONFIG_MIPS_CPU_SCACHE[0m
select [31mCONFIG_MIPS_L1_CACHE_SHIFT_7[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
select [31mCONFIG_CPU_HAS_RIXI[0m
config [31mCONFIG_SYS_HAS_CPU_LOONGSON3[0m
bool
select [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m
select [31mCONFIG_CPU_HAS_RIXI[0m
config [31mCONFIG_SYS_HAS_CPU_LOONGSON2E[0m
bool
config [31mCONFIG_SYS_HAS_CPU_LOONGSON2F[0m
bool
select [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m
select [31mCONFIG_CPU_SUPPORTS_ADDRWINCFG[0m if [31mCONFIG_64BIT[0m
select [31mCONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED[0m
config [31mCONFIG_SYS_HAS_CPU_LOONGSON1B[0m
bool
config [31mCONFIG_SYS_HAS_CPU_LOONGSON1C[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS32_R3_5[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS32_R5[0m
bool
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU[0m if [31mCONFIG_DMA_NONCOHERENT[0m
config [31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m
bool
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU[0m if [31mCONFIG_DMA_NONCOHERENT[0m
config [31mCONFIG_SYS_HAS_CPU_MIPS64_R1[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m
bool
config [31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m
bool
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU[0m if [31mCONFIG_DMA_NONCOHERENT[0m
config [31mCONFIG_SYS_HAS_CPU_R3000[0m
bool
config [31mCONFIG_SYS_HAS_CPU_TX39XX[0m
bool
config [31mCONFIG_SYS_HAS_CPU_VR41XX[0m
bool
config [31mCONFIG_SYS_HAS_CPU_R4X00[0m
bool
config [31mCONFIG_SYS_HAS_CPU_TX49XX[0m
bool
config [31mCONFIG_SYS_HAS_CPU_R5000[0m
bool
config [31mCONFIG_SYS_HAS_CPU_R5500[0m
bool
config [31mCONFIG_SYS_HAS_CPU_NEVADA[0m
bool
config [31mCONFIG_SYS_HAS_CPU_R10000[0m
bool
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU[0m if [31mCONFIG_DMA_NONCOHERENT[0m
config [31mCONFIG_SYS_HAS_CPU_RM7000[0m
bool
config [31mCONFIG_SYS_HAS_CPU_SB1[0m
bool
config [31mCONFIG_SYS_HAS_CPU_CAVIUM_OCTEON[0m
bool
config [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
bool
config [31mCONFIG_SYS_HAS_CPU_BMIPS32_3300[0m
bool
select [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
config [31mCONFIG_SYS_HAS_CPU_BMIPS4350[0m
bool
select [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
config [31mCONFIG_SYS_HAS_CPU_BMIPS4380[0m
bool
select [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
config [31mCONFIG_SYS_HAS_CPU_BMIPS5000[0m
bool
select [31mCONFIG_SYS_HAS_CPU_BMIPS[0m
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU[0m
config [31mCONFIG_SYS_HAS_CPU_XLR[0m
bool
config [31mCONFIG_SYS_HAS_CPU_XLP[0m
bool
#
# CPU may reorder R->R, R->W, W->R, W->W
# Reordering beyond LL and SC is handled in [31mCONFIG_WEAK_REORDERING_BEYOND_LLSC[0m
#
config [31mCONFIG_WEAK_ORDERING[0m
bool
#
# CPU may reorder reads and writes beyond LL/SC
# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
#
config [31mCONFIG_WEAK_REORDERING_BEYOND_LLSC[0m
bool
endmenu
#
# These two indicate any level of the MIPS32 and MIPS64 architecture
#
config [31mCONFIG_CPU_MIPS32[0m
bool
default y if [31mCONFIG_CPU_MIPS32_R1[0m || [31mCONFIG_CPU_MIPS32_R2[0m || [31mCONFIG_CPU_MIPS32_R6[0m
config [31mCONFIG_CPU_MIPS64[0m
bool
default y if [31mCONFIG_CPU_MIPS64_R1[0m || [31mCONFIG_CPU_MIPS64_R2[0m || [31mCONFIG_CPU_MIPS64_R6[0m
#
# These indicate the revision of the architecture
#
config [31mCONFIG_CPU_MIPSR1[0m
bool
default y if [31mCONFIG_CPU_MIPS32_R1[0m || [31mCONFIG_CPU_MIPS64_R1[0m
config [31mCONFIG_CPU_MIPSR2[0m
bool
default y if [31mCONFIG_CPU_MIPS32_R2[0m || [31mCONFIG_CPU_MIPS64_R2[0m || [31mCONFIG_CPU_CAVIUM_OCTEON[0m
select [31mCONFIG_CPU_HAS_RIXI[0m
select [31mCONFIG_MIPS_SPRAM[0m
config [31mCONFIG_CPU_MIPSR6[0m
bool
default y if [31mCONFIG_CPU_MIPS32_R6[0m || [31mCONFIG_CPU_MIPS64_R6[0m
select [31mCONFIG_CPU_HAS_RIXI[0m
select [31mCONFIG_HAVE_ARCH_BITREVERSE[0m
select [31mCONFIG_MIPS_ASID_BITS_VARIABLE[0m
select [31mCONFIG_MIPS_CRC_SUPPORT[0m
select [31mCONFIG_MIPS_SPRAM[0m
config [31mCONFIG_TARGET_ISA_REV[0m
int
default 1 if [31mCONFIG_CPU_MIPSR1[0m
default 2 if [31mCONFIG_CPU_MIPSR2[0m
default 6 if [31mCONFIG_CPU_MIPSR6[0m
default 0
help
Reflects the [31mCONFIG_ISA[0m revision being targeted by the kernel build. This
is effectively the Kconfig equivalent of MIPS_ISA_REV.
config [31mCONFIG_EVA[0m
bool
config [31mCONFIG_XPA[0m
bool
config [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
bool
config [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
bool
config [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m
bool
config [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m
bool
config [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m
bool
config [31mCONFIG_CPU_SUPPORTS_ADDRWINCFG[0m
bool
config [31mCONFIG_CPU_SUPPORTS_HUGEPAGES[0m
bool
depends on !([31mCONFIG_32BIT[0m && ([31mCONFIG_ARCH_PHYS_ADDR_T_64BIT[0m || [31mCONFIG_EVA[0m))
config [31mCONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED[0m
bool
config [31mCONFIG_MIPS_PGD_C0_CONTEXT[0m
bool
default y if [31mCONFIG_64BIT[0m && ([31mCONFIG_CPU_MIPSR2[0m || [31mCONFIG_CPU_MIPSR6[0m) && ![31mCONFIG_CPU_XLP[0m
#
# Set to y for ptrace access to watch registers.
#
config [31mCONFIG_HARDWARE_WATCHPOINTS[0m
bool
default y if [31mCONFIG_CPU_MIPSR1[0m || [31mCONFIG_CPU_MIPSR2[0m || [31mCONFIG_CPU_MIPSR6[0m
menu "Kernel type"
choice
prompt "Kernel code model"
help
You should only select this option if you have a workload that
actually benefits from 64-bit processing or if your machine has
large memory. You will only be presented a single option in this
menu if your system does not support both 32-bit and 64-bit kernels.
config [31mCONFIG_32BIT[0m
bool "32-bit kernel"
depends on [31mCONFIG_CPU_SUPPORTS_32BIT_KERNEL[0m && [31mCONFIG_SYS_SUPPORTS_32BIT_KERNEL[0m
select [31mCONFIG_TRAD_SIGNALS[0m
help
Select this option if you want to build a 32-bit kernel.
config [31mCONFIG_64BIT[0m
bool "64-bit kernel"
depends on [31mCONFIG_CPU_SUPPORTS_64BIT_KERNEL[0m && [31mCONFIG_SYS_SUPPORTS_64BIT_KERNEL[0m
help
Select this option if you want to build a 64-bit kernel.
endchoice
config [31mCONFIG_KVM_GUEST[0m
bool "KVM Guest Kernel"
depends on [31mCONFIG_BROKEN_ON_SMP[0m
help
Select this option if building a guest kernel for [31mCONFIG_KVM[0m (Trap & Emulate)
mode.
config [31mCONFIG_KVM_GUEST_TIMER_FREQ[0m
int "Count/Compare Timer Frequency (MHz)"
depends on [31mCONFIG_KVM_GUEST[0m
default 100
help
Set this to non-zero if building a guest kernel for [31mCONFIG_KVM[0m to skip [31mCONFIG_RTC[0m
emulation when determining guest CPU Frequency. Instead, the guest's
timer frequency is specified directly.
config [31mCONFIG_MIPS_VA_BITS_48[0m
bool "48 bits virtual memory"
depends on [31mCONFIG_64BIT[0m
help
Support a maximum at least 48 bits of application virtual
memory. Default is 40 bits or less, depending on the CPU.
For page sizes 16k and above, this option results in a small
memory overhead for page tables. For 4k page size, a fourth
level of page tables is added which imposes both a memory
overhead as well as slower TLB fault handling.
If unsure, say N.
choice
prompt "Kernel page size"
default [31mCONFIG_PAGE_SIZE_4KB[0m
config [31mCONFIG_PAGE_SIZE_4KB[0m
bool "4kB"
depends on ![31mCONFIG_CPU_LOONGSON2[0m && ![31mCONFIG_CPU_LOONGSON3[0m
help
This option select the standard 4kB Linux page size. On some
R3000-family processors this is the only available page size. Using
4kB page size will minimize memory consumption and is therefore
recommended for low memory systems.
config [31mCONFIG_PAGE_SIZE_8KB[0m
bool "8kB"
depends on [31mCONFIG_CPU_CAVIUM_OCTEON[0m
depends on ![31mCONFIG_MIPS_VA_BITS_48[0m
help
Using 8kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available
only on cnMIPS processors. Note that you will need a suitable Linux
distribution to support this.
config [31mCONFIG_PAGE_SIZE_16KB[0m
bool "16kB"
depends on ![31mCONFIG_CPU_R3000[0m && ![31mCONFIG_CPU_TX39XX[0m
help
Using 16kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
all non-R3000 family processors. Note that you will need a suitable
Linux distribution to support this.
config [31mCONFIG_PAGE_SIZE_32KB[0m
bool "32kB"
depends on [31mCONFIG_CPU_CAVIUM_OCTEON[0m
depends on ![31mCONFIG_MIPS_VA_BITS_48[0m
help
Using 32kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available
only on cnMIPS cores. Note that you will need a suitable Linux
distribution to support this.
config [31mCONFIG_PAGE_SIZE_64KB[0m
bool "64kB"
depends on ![31mCONFIG_CPU_R3000[0m && ![31mCONFIG_CPU_TX39XX[0m
help
Using 64kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
all non-R3000 family processor. Not that at the time of this
writing this option is still high experimental.
endchoice
config [31mCONFIG_FORCE_MAX_ZONEORDER[0m
int "Maximum zone order"
range 14 64 if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_64KB[0m
default "14" if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_64KB[0m
range 13 64 if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_32KB[0m
default "13" if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_32KB[0m
range 12 64 if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_16KB[0m
default "12" if [31mCONFIG_MIPS_HUGE_TLB_SUPPORT[0m && [31mCONFIG_PAGE_SIZE_16KB[0m
range 11 64
default "11"
help
The kernel memory allocator divides physically contiguous memory
blocks into "zones", where each zone is a power of two number of
pages. This option selects the largest power of two that the kernel
keeps in the memory allocator. If you need to allocate very large
blocks of physically contiguous memory, then you may need to
increase this value.
This config option is actually maximum order plus one. For example,
a value of 11 means that the largest free memory block is 2^10 pages.
The page size is not necessarily 4KB. Keep this in mind
when choosing a value for this option.
config [31mCONFIG_BOARD_SCACHE[0m
bool
config [31mCONFIG_IP22_CPU_SCACHE[0m
bool
select [31mCONFIG_BOARD_SCACHE[0m
#
# Support for a MIPS32 / MIPS64 style S-caches
#
config [31mCONFIG_MIPS_CPU_SCACHE[0m
bool
select [31mCONFIG_BOARD_SCACHE[0m
config [31mCONFIG_R5000_CPU_SCACHE[0m
bool
select [31mCONFIG_BOARD_SCACHE[0m
config [31mCONFIG_RM7000_CPU_SCACHE[0m
bool
select [31mCONFIG_BOARD_SCACHE[0m
config [31mCONFIG_SIBYTE_DMA_PAGEOPS[0m
bool "Use DMA to clear/copy pages"
depends on [31mCONFIG_CPU_SB1[0m
help
Instead of using the CPU to zero and copy pages, use a Data Mover
channel. These DMA channels are otherwise unused by the standard
SiByte Linux port. Seems to give a small performance benefit.
config [31mCONFIG_CPU_HAS_PREFETCH[0m
bool
config [31mCONFIG_CPU_GENERIC_DUMP_TLB[0m
bool
default y if !([31mCONFIG_CPU_R3000[0m || [31mCONFIG_CPU_TX39XX[0m)
config [31mCONFIG_MIPS_FP_SUPPORT[0m
bool "Floating Point support" if [31mCONFIG_EXPERT[0m
default y
help
Select y to include support for floating point in the kernel
including initialization of [31mCONFIG_FPU[0m hardware, FP context save & restore
and emulation of an [31mCONFIG_FPU[0m where necessary. Without this support any
userland program attempting to use floating point instructions will
receive a SIGILL.
If you know that your userland will not attempt to use floating point
instructions then you can say n here to shrink the kernel a little.
If unsure, say y.
config [31mCONFIG_CPU_R2300_FPU[0m
bool
depends on [31mCONFIG_MIPS_FP_SUPPORT[0m
default y if [31mCONFIG_CPU_R3000[0m || [31mCONFIG_CPU_TX39XX[0m
config [31mCONFIG_CPU_R3K_TLB[0m
bool
config [31mCONFIG_CPU_R4K_FPU[0m
bool
depends on [31mCONFIG_MIPS_FP_SUPPORT[0m
default y if ![31mCONFIG_CPU_R2300_FPU[0m
config [31mCONFIG_CPU_R4K_CACHE_TLB[0m
bool
default y if !([31mCONFIG_CPU_R3K_TLB[0m || [31mCONFIG_CPU_SB1[0m || [31mCONFIG_CPU_CAVIUM_OCTEON[0m)
config [31mCONFIG_MIPS_MT_SMP[0m
bool "MIPS MT SMP support (1 TC on each available VPE)"
default y
depends on [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m && ![31mCONFIG_CPU_MIPSR6[0m && ![31mCONFIG_CPU_MICROMIPS[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_VI[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_EI[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_MIPS_MT[0m
select [31mCONFIG_SMP[0m
select [31mCONFIG_SMP_UP[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_SYS_SUPPORTS_SCHED_SMT[0m
select [31mCONFIG_MIPS_PERF_SHARED_TC_COUNTERS[0m
help
This is a kernel model which is known as SMVP. This is supported
on cores with the MT ASE and uses the available VPEs to implement
virtual processors which supports [31mCONFIG_SMP[0m. This is equivalent to the
Intel Hyperthreading feature. For further information go to
<http://www.imgtec.com/mips/mips-multithreading.asp>.
config [31mCONFIG_MIPS_MT[0m
bool
config [31mCONFIG_SCHED_SMT[0m
bool "SMT (multithreading) scheduler support"
depends on [31mCONFIG_SYS_SUPPORTS_SCHED_SMT[0m
default n
help
SMT scheduler support improves the CPU scheduler's decision making
when dealing with [31mCONFIG_MIPS[0m MT enabled cores at a cost of slightly
increased overhead in some places. If unsure say N here.
config [31mCONFIG_SYS_SUPPORTS_SCHED_SMT[0m
bool
config [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
bool
config [31mCONFIG_MIPS_MT_FPAFF[0m
bool "Dynamic FPU affinity for FP-intensive threads"
default y
depends on [31mCONFIG_MIPS_MT_SMP[0m
config [31mCONFIG_MIPSR2_TO_R6_EMULATOR[0m
bool "MIPS R2-to-R6 emulator"
depends on [31mCONFIG_CPU_MIPSR6[0m
depends on [31mCONFIG_MIPS_FP_SUPPORT[0m
default y
help
Choose this option if you want to run non-R6 [31mCONFIG_MIPS[0m userland code.
Even if you say 'Y' here, the emulator will still be disabled by
default. You can enable it using the 'mipsr2emu' kernel option.
The only reason this is a build-time option is to save ~14K from the
final kernel image.
config [31mCONFIG_SYS_SUPPORTS_VPE_LOADER[0m
bool
depends on [31mCONFIG_SYS_SUPPORTS_MULTITHREADING[0m
help
Indicates that the platform supports the VPE loader, and provides
physical_memsize.
config [31mCONFIG_MIPS_VPE_LOADER[0m
bool "VPE loader support."
depends on [31mCONFIG_SYS_SUPPORTS_VPE_LOADER[0m && [31mCONFIG_MODULES[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_VI[0m
select [31mCONFIG_CPU_MIPSR2_IRQ_EI[0m
select [31mCONFIG_MIPS_MT[0m
help
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
config [31mCONFIG_MIPS_VPE_LOADER_CMP[0m
bool
default "y"
depends on [31mCONFIG_MIPS_VPE_LOADER[0m && [31mCONFIG_MIPS_CMP[0m
config [31mCONFIG_MIPS_VPE_LOADER_MT[0m
bool
default "y"
depends on [31mCONFIG_MIPS_VPE_LOADER[0m && ![31mCONFIG_MIPS_CMP[0m
config [31mCONFIG_MIPS_VPE_LOADER_TOM[0m
bool "Load VPE program into memory hidden from linux"
depends on [31mCONFIG_MIPS_VPE_LOADER[0m
default y
help
The loader can use memory that is present but has been hidden from
Linux using the kernel command line option "mem=xxMB". It's up to
you to ensure the amount you put in the option and the space your
program requires is less or equal to the amount physically present.
config [31mCONFIG_MIPS_VPE_APSP_API[0m
bool "Enable support for AP/SP API (RTLX)"
depends on [31mCONFIG_MIPS_VPE_LOADER[0m
config [31mCONFIG_MIPS_VPE_APSP_API_CMP[0m
bool
default "y"
depends on [31mCONFIG_MIPS_VPE_APSP_API[0m && [31mCONFIG_MIPS_CMP[0m
config [31mCONFIG_MIPS_VPE_APSP_API_MT[0m
bool
default "y"
depends on [31mCONFIG_MIPS_VPE_APSP_API[0m && ![31mCONFIG_MIPS_CMP[0m
config [31mCONFIG_MIPS_CMP[0m
bool "MIPS CMP framework support (DEPRECATED)"
depends on [31mCONFIG_SYS_SUPPORTS_MIPS_CMP[0m && ![31mCONFIG_CPU_MIPSR6[0m
select [31mCONFIG_SMP[0m
select [31mCONFIG_SYNC_R4K[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_WEAK_ORDERING[0m
default n
help
Select this if you are using a bootloader which implements the "CMP
framework" protocol (ie. YAMON) and want your kernel to make use of
its ability to start secondary CPUs.
Unless you have a specific need, you should use CONFIG_MIPS_CPS
instead of this.
config [31mCONFIG_MIPS_CPS[0m
bool "MIPS Coherent Processing System support"
depends on [31mCONFIG_SYS_SUPPORTS_MIPS_CPS[0m
select [31mCONFIG_MIPS_CM[0m
select [31mCONFIG_MIPS_CPS_PM[0m if [31mCONFIG_HOTPLUG_CPU[0m
select [31mCONFIG_SMP[0m
select [31mCONFIG_SYNC_R4K[0m if ([31mCONFIG_CEVT_R4K[0m || [31mCONFIG_CSRC_R4K[0m)
select [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
select [31mCONFIG_SYS_SUPPORTS_SCHED_SMT[0m if [31mCONFIG_CPU_MIPSR6[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_WEAK_ORDERING[0m
help
Select this if you wish to run an [31mCONFIG_SMP[0m kernel across multiple cores
within a [31mCONFIG_MIPS[0m Coherent Processing System. When this option is
enabled the kernel will probe for other cores and boot them with
no external assistance. It is safe to enable this when hardware
support is unavailable.
config [31mCONFIG_MIPS_CPS_PM[0m
depends on [31mCONFIG_MIPS_CPS[0m
bool
config [31mCONFIG_MIPS_CM[0m
bool
select [31mCONFIG_MIPS_CPC[0m
config [31mCONFIG_MIPS_CPC[0m
bool
config [31mCONFIG_SB1_PASS_2_WORKAROUNDS[0m
bool
depends on [31mCONFIG_CPU_SB1[0m && ([31mCONFIG_CPU_SB1_PASS_2_2[0m || [31mCONFIG_CPU_SB1_PASS_2[0m)
default y
config [31mCONFIG_SB1_PASS_2_1_WORKAROUNDS[0m
bool
depends on [31mCONFIG_CPU_SB1[0m && [31mCONFIG_CPU_SB1_PASS_2[0m
default y
choice
prompt "SmartMIPS or microMIPS ASE support"
config [31mCONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS[0m
bool "None"
help
Select this if you want neither microMIPS nor SmartMIPS support
config [31mCONFIG_CPU_HAS_SMARTMIPS[0m
depends on [31mCONFIG_SYS_SUPPORTS_SMARTMIPS[0m
bool "SmartMIPS"
help
SmartMIPS is a extension of the MIPS32 architecture aimed at
increased security at both hardware and software level for
smartcards. Enabling this option will allow proper use of the
SmartMIPS instructions by Linux applications. However a kernel with
this option will not work on a [31mCONFIG_MIPS[0m core without SmartMIPS core. If
you don't know you probably don't have SmartMIPS and should say N
here.
config [31mCONFIG_CPU_MICROMIPS[0m
depends on [31mCONFIG_32BIT[0m && [31mCONFIG_SYS_SUPPORTS_MICROMIPS[0m && ![31mCONFIG_CPU_MIPSR6[0m
bool "microMIPS"
help
When this option is enabled the kernel will be built using the
microMIPS [31mCONFIG_ISA[0m
endchoice
config [31mCONFIG_CPU_HAS_MSA[0m
bool "Support for the MIPS SIMD Architecture"
depends on [31mCONFIG_CPU_SUPPORTS_MSA[0m
depends on [31mCONFIG_MIPS_FP_SUPPORT[0m
depends on [31mCONFIG_64BIT[0m || [31mCONFIG_MIPS_O32_FP64_SUPPORT[0m
help
[31mCONFIG_MIPS[0m SIMD Architecture (MSA) introduces 128 bit wide vector registers
and a set of SIMD instructions to operate on them. When this option
is enabled the kernel will support allocating & switching MSA
vector register contexts. If you know that your kernel will only be
running on CPUs which do not support MSA or that your userland will
not be making use of it then you may wish to say N here to reduce
the size & complexity of your kernel.
If unsure, say Y.
config [31mCONFIG_CPU_HAS_WB[0m
bool
config [31mCONFIG_XKS01[0m
bool
config [31mCONFIG_CPU_HAS_RIXI[0m
bool
config [31mCONFIG_CPU_HAS_LOAD_STORE_LR[0m
bool
help
CPU has support for unaligned load and store instructions:
LWL, LWR, SWL, SWR (Load/store word left/right).
LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
#
# Vectored interrupt mode is an R2 feature
#
config [31mCONFIG_CPU_MIPSR2_IRQ_VI[0m
bool
#
# Extended interrupt mode is an R2 feature
#
config [31mCONFIG_CPU_MIPSR2_IRQ_EI[0m
bool
config [31mCONFIG_CPU_HAS_SYNC[0m
bool
depends on ![31mCONFIG_CPU_R3000[0m
default y
#
# CPU non-features
#
config [31mCONFIG_CPU_DADDI_WORKAROUNDS[0m
bool
config [31mCONFIG_CPU_R4000_WORKAROUNDS[0m
bool
select [31mCONFIG_CPU_R4400_WORKAROUNDS[0m
config [31mCONFIG_CPU_R4400_WORKAROUNDS[0m
bool
config [31mCONFIG_MIPS_ASID_SHIFT[0m
int
default 6 if [31mCONFIG_CPU_R3000[0m || [31mCONFIG_CPU_TX39XX[0m
default 0
config [31mCONFIG_MIPS_ASID_BITS[0m
int
default 0 if [31mCONFIG_MIPS_ASID_BITS_VARIABLE[0m
default 6 if [31mCONFIG_CPU_R3000[0m || [31mCONFIG_CPU_TX39XX[0m
default 8
config [31mCONFIG_MIPS_ASID_BITS_VARIABLE[0m
bool
config [31mCONFIG_MIPS_CRC_SUPPORT[0m
bool
#
# - Highmem only makes sense for the 32-bit kernel.
# - The current highmem code will only work properly on physically indexed
# caches such as R3000, SB1, R7000 or those that look like they're virtually
# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
# moment we protect the user and offer the highmem option only on machines
# where it's known to be safe. This will not offer highmem on a few systems
# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
# indexed CPUs but we're playing safe.
# - We use [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m to offer highmem only for systems where we
# know they might have memory configurations that could make use of highmem
# support.
#
config [31mCONFIG_HIGHMEM[0m
bool "High Memory Support"
depends on [31mCONFIG_32BIT[0m && [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m && [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m && ![31mCONFIG_CPU_MIPS32_3_5_EVA[0m
config [31mCONFIG_CPU_SUPPORTS_HIGHMEM[0m
bool
config [31mCONFIG_SYS_SUPPORTS_HIGHMEM[0m
bool
config [31mCONFIG_SYS_SUPPORTS_SMARTMIPS[0m
bool
config [31mCONFIG_SYS_SUPPORTS_MICROMIPS[0m
bool
config [31mCONFIG_SYS_SUPPORTS_MIPS16[0m
bool
help
This option must be set if a kernel might be executed on a MIPS16-
enabled CPU even if MIPS16 is not actually being used. In other
words, it makes the kernel MIPS16-tolerant.
config [31mCONFIG_CPU_SUPPORTS_MSA[0m
bool
config [31mCONFIG_ARCH_FLATMEM_ENABLE[0m
def_bool y
depends on ![31mCONFIG_NUMA[0m && ![31mCONFIG_CPU_LOONGSON2[0m
config [31mCONFIG_ARCH_DISCONTIGMEM_ENABLE[0m
bool
default y if [31mCONFIG_SGI_IP27[0m
help
Say Y to support efficient handling of discontiguous physical memory,
for architectures which are either [31mCONFIG_NUMA[0m (Non-Uniform Memory Access)
or have huge holes in the physical address space for other reasons.
See <file:Documentation/vm/numa.rst> for more.
config [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
bool
select [31mCONFIG_SPARSEMEM_STATIC[0m
config [31mCONFIG_NUMA[0m
bool "NUMA Support"
depends on [31mCONFIG_SYS_SUPPORTS_NUMA[0m
help
Say Y to compile the kernel to support [31mCONFIG_NUMA[0m (Non-Uniform Memory
Access). This option improves performance on systems with more
than two nodes; on two node systems it is generally better to
leave it disabled; on single node systems disable this option
disabled.
config [31mCONFIG_SYS_SUPPORTS_NUMA[0m
bool
config [31mCONFIG_RELOCATABLE[0m
bool "Relocatable kernel"
depends on [31mCONFIG_SYS_SUPPORTS_RELOCATABLE[0m && ([31mCONFIG_CPU_MIPS32_R2[0m || [31mCONFIG_CPU_MIPS64_R2[0m || [31mCONFIG_CPU_MIPS32_R6[0m || [31mCONFIG_CPU_MIPS64_R6[0m || [31mCONFIG_CAVIUM_OCTEON_SOC[0m)
help
This builds a kernel image that retains relocation information
so it can be loaded someplace besides the default 1MB.
The relocations make the kernel binary about 15% larger,
but are discarded at runtime
config [31mCONFIG_RELOCATION_TABLE_SIZE[0m
hex "Relocation table size"
depends on [31mCONFIG_RELOCATABLE[0m
range 0x0 0x01000000
default "0x00100000"
---help---
[31mCONFIG_A[0m table of relocation data will be appended to the kernel binary
and parsed at boot to fix up the relocated kernel.
This option allows the amount of space reserved for the table to be
adjusted, although the default of 1Mb should be ok in most cases.
The build will fail and a valid size suggested if this is too small.
If unsure, leave at the default value.
config [31mCONFIG_RANDOMIZE_BASE[0m
bool "Randomize the address of the kernel image"
depends on [31mCONFIG_RELOCATABLE[0m
---help---
Randomizes the physical and virtual address at which the
kernel image is loaded, as a security feature that
deters exploit attempts relying on knowledge of the location
of kernel internals.
Entropy is generated using any coprocessor 0 registers available.
The kernel will be offset by up to [31mCONFIG_RANDOMIZE_BASE_MAX_OFFSET[0m.
If unsure, say N.
config [31mCONFIG_RANDOMIZE_BASE_MAX_OFFSET[0m
hex "Maximum kASLR offset" if [31mCONFIG_EXPERT[0m
depends on [31mCONFIG_RANDOMIZE_BASE[0m
range 0x0 0x40000000 if [31mCONFIG_EVA[0m || [31mCONFIG_64BIT[0m
range 0x0 0x08000000
default "0x01000000"
---help---
When kASLR is active, this provides the maximum offset that will
be applied to the kernel image. It should be set according to the
amount of physical RAM available in the target system minus
[31mCONFIG_PHYSICAL_START[0m and must be a power of 2.
This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
[31mCONFIG_EVA[0m or 64-bit. The default is 16Mb.
config [31mCONFIG_NODES_SHIFT[0m
int
default "6"
depends on [31mCONFIG_NEED_MULTIPLE_NODES[0m
config [31mCONFIG_HW_PERF_EVENTS[0m
bool "Enable hardware performance counter support for perf events"
depends on [31mCONFIG_PERF_EVENTS[0m && ![31mCONFIG_OPROFILE[0m && ([31mCONFIG_CPU_MIPS32[0m || [31mCONFIG_CPU_MIPS64[0m || [31mCONFIG_CPU_R10000[0m || [31mCONFIG_CPU_SB1[0m || [31mCONFIG_CPU_CAVIUM_OCTEON[0m || [31mCONFIG_CPU_XLP[0m || [31mCONFIG_CPU_LOONGSON3[0m)
default y
help
Enable hardware performance counter support for perf events. If
disabled, perf events will use software events only.
config [31mCONFIG_SMP[0m
bool "Multi-Processing support"
depends on [31mCONFIG_SYS_SUPPORTS_SMP[0m
help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, say N. If you have a system with more
than one CPU, say Y.
If you say N here, the kernel will run on uni- and multiprocessor
machines, but will use only one CPU of a multiprocessor machine. If
you say Y here, the kernel will run on many, but not all,
uniprocessor machines. On a uniprocessor machine, the kernel
will run faster if you say N here.
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
See also the [31mCONFIG_SMP[0m-HOWTO available at
<http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
config [31mCONFIG_HOTPLUG_CPU[0m
bool "Support for hot-pluggable CPUs"
depends on [31mCONFIG_SMP[0m && [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m
help
Say Y here to allow turning CPUs off and on. CPUs can be
controlled through /sys/devices/system/cpu.
(Note: power management support will enable this option
automatically on [31mCONFIG_SMP[0m systems. )
Say N if you want to disable CPU hotplug.
config [31mCONFIG_SMP_UP[0m
bool
config [31mCONFIG_SYS_SUPPORTS_MIPS_CMP[0m
bool
config [31mCONFIG_SYS_SUPPORTS_MIPS_CPS[0m
bool
config [31mCONFIG_SYS_SUPPORTS_SMP[0m
bool
config [31mCONFIG_NR_CPUS_DEFAULT_4[0m
bool
config [31mCONFIG_NR_CPUS_DEFAULT_8[0m
bool
config [31mCONFIG_NR_CPUS_DEFAULT_16[0m
bool
config [31mCONFIG_NR_CPUS_DEFAULT_32[0m
bool
config [31mCONFIG_NR_CPUS_DEFAULT_64[0m
bool
config [31mCONFIG_NR_CPUS[0m
int "Maximum number of CPUs (2-256)"
range 2 256
depends on [31mCONFIG_SMP[0m
default "4" if [31mCONFIG_NR_CPUS_DEFAULT_4[0m
default "8" if [31mCONFIG_NR_CPUS_DEFAULT_8[0m
default "16" if [31mCONFIG_NR_CPUS_DEFAULT_16[0m
default "32" if [31mCONFIG_NR_CPUS_DEFAULT_32[0m
default "64" if [31mCONFIG_NR_CPUS_DEFAULT_64[0m
help
This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 for 32-bit
kernel and 64 for 64-bit kernels; the minimum value which makes
sense is 1 for Qemu (useful only for kernel debugging purposes)
and 2 for all others.
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image. For best
performance should round up your number of processors to the next
power of two.
config [31mCONFIG_MIPS_PERF_SHARED_TC_COUNTERS[0m
bool
config [31mCONFIG_MIPS_NR_CPU_NR_MAP_1024[0m
bool
config [31mCONFIG_MIPS_NR_CPU_NR_MAP[0m
int
depends on [31mCONFIG_SMP[0m
default 1024 if [31mCONFIG_MIPS_NR_CPU_NR_MAP_1024[0m
default [31mCONFIG_NR_CPUS[0m if ![31mCONFIG_MIPS_NR_CPU_NR_MAP_1024[0m
#
# Timer Interrupt Frequency Configuration
#
choice
prompt "Timer frequency"
default [31mCONFIG_HZ_250[0m
help
Allows the configuration of the timer frequency.
config [31mCONFIG_HZ_24[0m
bool "24 HZ" if [31mCONFIG_SYS_SUPPORTS_24HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_48[0m
bool "48 HZ" if [31mCONFIG_SYS_SUPPORTS_48HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_100[0m
bool "100 HZ" if [31mCONFIG_SYS_SUPPORTS_100HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_128[0m
bool "128 HZ" if [31mCONFIG_SYS_SUPPORTS_128HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_250[0m
bool "250 HZ" if [31mCONFIG_SYS_SUPPORTS_250HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_256[0m
bool "256 HZ" if [31mCONFIG_SYS_SUPPORTS_256HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_1000[0m
bool "1000 HZ" if [31mCONFIG_SYS_SUPPORTS_1000HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
config [31mCONFIG_HZ_1024[0m
bool "1024 HZ" if [31mCONFIG_SYS_SUPPORTS_1024HZ[0m || [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
endchoice
config [31mCONFIG_SYS_SUPPORTS_24HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_48HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_100HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_128HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_250HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_256HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_1000HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_1024HZ[0m
bool
config [31mCONFIG_SYS_SUPPORTS_ARBIT_HZ[0m
bool
default y if ![31mCONFIG_SYS_SUPPORTS_24HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_48HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_100HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_128HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_250HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_256HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_1000HZ[0m && \
![31mCONFIG_SYS_SUPPORTS_1024HZ[0m
config [31mCONFIG_HZ[0m
int
default 24 if [31mCONFIG_HZ_24[0m
default 48 if [31mCONFIG_HZ_48[0m
default 100 if [31mCONFIG_HZ_100[0m
default 128 if [31mCONFIG_HZ_128[0m
default 250 if [31mCONFIG_HZ_250[0m
default 256 if [31mCONFIG_HZ_256[0m
default 1000 if [31mCONFIG_HZ_1000[0m
default 1024 if [31mCONFIG_HZ_1024[0m
config [31mCONFIG_SCHED_HRTICK[0m
def_bool [31mCONFIG_HIGH_RES_TIMERS[0m
config [31mCONFIG_KEXEC[0m
bool "Kexec system call"
select [31mCONFIG_KEXEC_CORE[0m
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
but it is independent of the system firmware. And like a reboot
you can start any kernel with it, not just Linux.
The name comes from the similarity to the exec system call.
It is an ongoing process to be certain the hardware in a machine
is properly shutdown, so do not be surprised if this code does not
initially work for you. As of this writing the exact hardware
interface is strongly in flux, so no good recommendation can be
made.
config [31mCONFIG_CRASH_DUMP[0m
bool "Kernel crash dumps"
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
which are loaded in the main kernel with kexec-tools into
a specially reserved region and then later executed after
a crash by kdump/kexec. The crash dump kernel must be compiled
to a memory address not used by the main kernel or firmware using
[31mCONFIG_PHYSICAL_START[0m.
config [31mCONFIG_PHYSICAL_START[0m
hex "Physical address where the kernel is loaded"
default "0xffffffff84000000"
depends on [31mCONFIG_CRASH_DUMP[0m
help
This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
If you plan to use kernel for capturing the crash dump change
this value to start of the reserved region (the "X" value as
specified in the "crashkernel=YM@XM" command line boot parameter
passed to the panic-ed kernel).
config [31mCONFIG_SECCOMP[0m
bool "Enable seccomp to safely compute untrusted bytecode"
depends on [31mCONFIG_PROC_FS[0m
default y
help
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
execution. By using pipes or other transports made available to
the process as file descriptors supporting the read/write
syscalls, it's possible to isolate those applications in
their own address space using seccomp. Once seccomp is
enabled via /proc/<pid>/seccomp, it cannot be disabled
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
If unsure, say Y. Only embedded should say N here.
config [31mCONFIG_MIPS_O32_FP64_SUPPORT[0m
bool "Support for O32 binaries using 64-bit FP" if ![31mCONFIG_CPU_MIPSR6[0m
depends on [31mCONFIG_32BIT[0m || [31mCONFIG_MIPS32_O32[0m
help
When this is enabled, the kernel will support use of 64-bit floating
point registers with binaries using the O32 ABI along with the
EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
32-bit [31mCONFIG_MIPS[0m systems this support is at the cost of increasing the
size and complexity of the compiled [31mCONFIG_FPU[0m emulator. Thus if you are
running a MIPS32 system and know that none of your userland binaries
will require 64-bit floating point, you may wish to reduce the size
of your kernel & potentially improve FP emulation performance by
saying N here.
Although binutils currently supports use of this flag the details
concerning its effect upon the O32 ABI in userland are still being
worked on. In order to avoid userland becoming dependant upon current
behaviour before the details have been finalised, this option should
be considered experimental and only enabled by those working upon
said details.
If unsure, say N.
config [31mCONFIG_USE_OF[0m
bool
select [31mCONFIG_OF[0m
select [31mCONFIG_OF_EARLY_FLATTREE[0m
select [31mCONFIG_IRQ_DOMAIN[0m
config [31mCONFIG_UHI_BOOT[0m
bool
config [31mCONFIG_BUILTIN_DTB[0m
bool
choice
prompt "Kernel appended dtb support" if [31mCONFIG_USE_OF[0m
default [31mCONFIG_MIPS_NO_APPENDED_DTB[0m
config [31mCONFIG_MIPS_NO_APPENDED_DTB[0m
bool "None"
help
Do not enable appended dtb support.
config [31mCONFIG_MIPS_ELF_APPENDED_DTB[0m
bool "vmlinux"
help
With this option, the boot code will look for a device tree binary
DTB) included in the vmlinux ELF section .appended_dtb. By default
it is empty and the DTB can be appended using binutils command
objcopy:
objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
This is meant as a backward compatiblity convenience for those
systems with a bootloader that can't be upgraded to accommodate
the documented boot protocol using a device tree.
config [31mCONFIG_MIPS_RAW_APPENDED_DTB[0m
bool "vmlinux.bin or vmlinuz.bin"
help
With this option, the boot code will look for a device tree binary
DTB) appended to raw vmlinux.bin or vmlinuz.bin.
(e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
This is meant as a backward compatibility convenience for those
systems with a bootloader that can't be upgraded to accommodate
the documented boot protocol using a device tree.
Beware that there is very little in terms of protection against
this option being confused by leftover garbage in memory that might
look like a DTB header after a reboot if no actual DTB is appended
to vmlinux.bin. Do not leave this option active in a production kernel
if you don't intend to always append a DTB.
endchoice
choice
prompt "Kernel command line type" if ![31mCONFIG_CMDLINE_OVERRIDE[0m
default [31mCONFIG_MIPS_CMDLINE_FROM_DTB[0m if [31mCONFIG_USE_OF[0m && ![31mCONFIG_ATH79[0m && ![31mCONFIG_MACH_INGENIC[0m && \
![31mCONFIG_MIPS_MALTA[0m && \
![31mCONFIG_CAVIUM_OCTEON_SOC[0m
default [31mCONFIG_MIPS_CMDLINE_FROM_BOOTLOADER[0m
config [31mCONFIG_MIPS_CMDLINE_FROM_DTB[0m
depends on [31mCONFIG_USE_OF[0m
bool "Dtb kernel arguments if available"
config [31mCONFIG_MIPS_CMDLINE_DTB_EXTEND[0m
depends on [31mCONFIG_USE_OF[0m
bool "Extend dtb kernel arguments with bootloader arguments"
config [31mCONFIG_MIPS_CMDLINE_FROM_BOOTLOADER[0m
bool "Bootloader kernel arguments if available"
config [31mCONFIG_MIPS_CMDLINE_BUILTIN_EXTEND[0m
depends on [31mCONFIG_CMDLINE_BOOL[0m
bool "Extend builtin kernel arguments with bootloader arguments"
endchoice
endmenu
config [31mCONFIG_LOCKDEP_SUPPORT[0m
bool
default y
config [31mCONFIG_STACKTRACE_SUPPORT[0m
bool
default y
config [31mCONFIG_PGTABLE_LEVELS[0m
int
default 4 if [31mCONFIG_PAGE_SIZE_4KB[0m && [31mCONFIG_MIPS_VA_BITS_48[0m
default 3 if [31mCONFIG_64BIT[0m && ![31mCONFIG_PAGE_SIZE_64KB[0m
default 2
config [31mCONFIG_MIPS_AUTO_PFN_OFFSET[0m
bool
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
config [31mCONFIG_PCI_DRIVERS_GENERIC[0m
select [31mCONFIG_PCI_DOMAINS_GENERIC[0m if [31mCONFIG_PCI[0m
bool
config [31mCONFIG_PCI_DRIVERS_LEGACY[0m
def_bool ![31mCONFIG_PCI_DRIVERS_GENERIC[0m
select [31mCONFIG_NO_GENERIC_PCI_IOPORT_MAP[0m
select [31mCONFIG_PCI_DOMAINS[0m if [31mCONFIG_PCI[0m
#
# [31mCONFIG_ISA[0m support is now enabled via select. Too many systems still have the one
# or other [31mCONFIG_ISA[0m chip on the board that users don't know about so don't expect
# users to choose the right thing ...
#
config [31mCONFIG_ISA[0m
bool
config [31mCONFIG_TC[0m
bool "TURBOchannel support"
depends on [31mCONFIG_MACH_DECSTATION[0m
help
TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and [31mCONFIG_MIPS[0m
processors. TURBOchannel programming specifications are available
at:
<ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
and:
<http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
Linux driver support status is documented at:
<http://www.linux-mips.org/wiki/DECstation>
config [31mCONFIG_MMU[0m
bool
default y
config [31mCONFIG_ARCH_MMAP_RND_BITS_MIN[0m
default 12 if [31mCONFIG_64BIT[0m
default 8
config [31mCONFIG_ARCH_MMAP_RND_BITS_MAX[0m
default 18 if [31mCONFIG_64BIT[0m
default 15
config [31mCONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN[0m
default 8
config [31mCONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX[0m
default 15
config [31mCONFIG_I8253[0m
bool
select [31mCONFIG_CLKSRC_I8253[0m
select [31mCONFIG_CLKEVT_I8253[0m
select [31mCONFIG_MIPS_EXTERNAL_TIMER[0m
config [31mCONFIG_ZONE_DMA[0m
bool
config [31mCONFIG_ZONE_DMA32[0m
bool
endmenu
config [31mCONFIG_TRAD_SIGNALS[0m
bool
config [31mCONFIG_MIPS32_COMPAT[0m
bool
config [31mCONFIG_COMPAT[0m
bool
config [31mCONFIG_SYSVIPC_COMPAT[0m
bool
config [31mCONFIG_MIPS32_O32[0m
bool "Kernel support for o32 binaries"
depends on [31mCONFIG_64BIT[0m
select [31mCONFIG_ARCH_WANT_OLD_COMPAT_IPC[0m
select [31mCONFIG_COMPAT[0m
select [31mCONFIG_MIPS32_COMPAT[0m
select [31mCONFIG_SYSVIPC_COMPAT[0m if [31mCONFIG_SYSVIPC[0m
help
Select this option if you want to run o32 binaries. These are pure
32-bit binaries as used by the 32-bit Linux/[31mCONFIG_MIPS[0m port. Most of
existing binaries are in this format.
If unsure, say Y.
config [31mCONFIG_MIPS32_N32[0m
bool "Kernel support for n32 binaries"
depends on [31mCONFIG_64BIT[0m
select [31mCONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION[0m
select [31mCONFIG_COMPAT[0m
select [31mCONFIG_MIPS32_COMPAT[0m
select [31mCONFIG_SYSVIPC_COMPAT[0m if [31mCONFIG_SYSVIPC[0m
help
Select this option if you want to run n32 binaries. These are
64-bit binaries using 32-bit quantities for addressing and certain
data that would normally be 64-bit. They are used in special
cases.
If unsure, say N.
config [31mCONFIG_BINFMT_ELF32[0m
bool
default y if [31mCONFIG_MIPS32_O32[0m || [31mCONFIG_MIPS32_N32[0m
select [31mCONFIG_ELFCORE[0m
menu "Power management options"
config [31mCONFIG_ARCH_HIBERNATION_POSSIBLE[0m
def_bool y
depends on [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m || ![31mCONFIG_SMP[0m
config [31mCONFIG_ARCH_SUSPEND_POSSIBLE[0m
def_bool y
depends on [31mCONFIG_SYS_SUPPORTS_HOTPLUG_CPU[0m || ![31mCONFIG_SMP[0m
source "kernel/power/Kconfig"
endmenu
config [31mCONFIG_MIPS_EXTERNAL_TIMER[0m
bool
menu "CPU Power Management"
if [31mCONFIG_CPU_SUPPORTS_CPUFREQ[0m && [31mCONFIG_MIPS_EXTERNAL_TIMER[0m
source "drivers/cpufreq/Kconfig"
endif
source "drivers/cpuidle/Kconfig"
endmenu
source "drivers/firmware/Kconfig"
source "arch/mips/kvm/Kconfig"