1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 | /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASMSPARC_ELF_H #define __ASMSPARC_ELF_H /* * ELF register definitions.. */ #include <asm/ptrace.h> /* * Sparc section types */ #define STT_REGISTER 13 /* * Sparc ELF relocation types */ #define R_SPARC_NONE 0 #define R_SPARC_8 1 #define R_SPARC_16 2 #define R_SPARC_32 3 #define R_SPARC_DISP8 4 #define R_SPARC_DISP16 5 #define R_SPARC_DISP32 6 #define R_SPARC_WDISP30 7 #define R_SPARC_WDISP22 8 #define R_SPARC_HI22 9 #define R_SPARC_22 10 #define R_SPARC_13 11 #define R_SPARC_LO10 12 #define R_SPARC_GOT10 13 #define R_SPARC_GOT13 14 #define R_SPARC_GOT22 15 #define R_SPARC_PC10 16 #define R_SPARC_PC22 17 #define R_SPARC_WPLT30 18 #define R_SPARC_COPY 19 #define R_SPARC_GLOB_DAT 20 #define R_SPARC_JMP_SLOT 21 #define R_SPARC_RELATIVE 22 #define R_SPARC_UA32 23 #define R_SPARC_PLT32 24 #define R_SPARC_HIPLT22 25 #define R_SPARC_LOPLT10 26 #define R_SPARC_PCPLT32 27 #define R_SPARC_PCPLT22 28 #define R_SPARC_PCPLT10 29 #define R_SPARC_10 30 #define R_SPARC_11 31 #define R_SPARC_64 32 #define R_SPARC_OLO10 33 #define R_SPARC_WDISP16 40 #define R_SPARC_WDISP19 41 #define R_SPARC_7 43 #define R_SPARC_5 44 #define R_SPARC_6 45 /* Bits present in AT_HWCAP, primarily for Sparc32. */ #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ #define HWCAP_SPARC_STBAR 2 #define HWCAP_SPARC_SWAP 4 #define HWCAP_SPARC_MULDIV 8 #define HWCAP_SPARC_V9 16 #define HWCAP_SPARC_ULTRA3 32 #define CORE_DUMP_USE_REGSET /* Format is: * G0 --> G7 * O0 --> O7 * L0 --> L7 * I0 --> I7 * PSR, PC, nPC, Y, WIM, TBR */ typedef unsigned long elf_greg_t; #define ELF_NGREG 38 typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef struct { union { unsigned long pr_regs[32]; double pr_dregs[16]; } pr_fr; unsigned long __unused; unsigned long pr_fsr; unsigned char pr_qcnt; unsigned char pr_q_entrysize; unsigned char pr_en; unsigned int pr_q[64]; } elf_fpregset_t; #include <asm/mbus.h> /* * This is used to ensure we don't load something for the wrong architecture. */ #define elf_check_arch(x) ((x)->e_machine == EM_SPARC) /* * These are used to set parameters in the core dumps. */ #define ELF_ARCH EM_SPARC #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2MSB #define ELF_EXEC_PAGESIZE 4096 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical use of this is to invoke "./ld.so someprog" to test out a new version of the loader. We need to make sure that it is out of the way of the program that it will "exec", and that there is sufficient room for the brk. */ #define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) /* This yields a mask that user programs can use to figure out what instruction set this cpu supports. This can NOT be done in userspace on Sparc. */ /* Most sun4m's have them all. */ #define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in intent than poking at uname or /proc/cpuinfo. */ #define ELF_PLATFORM (NULL) #endif /* !(__ASMSPARC_ELF_H) */ |