Defined in 3 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 1843 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 6663 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 1955 (as a macro)