#ifndef _ASM_ARCH_CACHE_H #define _ASM_ARCH_CACHE_H /* Etrax 100LX have 32-byte cache-lines. */ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 #endif /* _ASM_ARCH_CACHE_H */ |
#ifndef _ASM_ARCH_CACHE_H #define _ASM_ARCH_CACHE_H /* Etrax 100LX have 32-byte cache-lines. */ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 #endif /* _ASM_ARCH_CACHE_H */ |