1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 | /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2003, 2004 Ralf Baechle * Copyright (C) 2004 Maciej W. Rozycki */ #ifndef __ASM_CPU_TYPE_H #define __ASM_CPU_TYPE_H #include <linux/smp.h> #include <linux/compiler.h> static inline int __pure __get_cpu_type(const int cpu_type) { switch (cpu_type) { #if defined([31mCONFIG_SYS_HAS_CPU_LOONGSON2E[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_LOONGSON2F[0m) case CPU_LOONGSON2: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_LOONGSON3[0m case CPU_LOONGSON3: #endif #if defined([31mCONFIG_SYS_HAS_CPU_LOONGSON1B[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_LOONGSON1C[0m) case CPU_LOONGSON1: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m case CPU_4KC: case CPU_ALCHEMY: case CPU_PR4450: #endif #if defined([31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m) case CPU_4KEC: case CPU_JZRISC: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m case CPU_4KSC: case CPU_24K: case CPU_34K: case CPU_1004K: case CPU_74K: case CPU_M14KC: case CPU_M14KEC: case CPU_INTERAPTIV: case CPU_PROAPTIV: case CPU_P5600: case CPU_M5150: #endif #if defined([31mCONFIG_SYS_HAS_CPU_MIPS32_R2[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m) || \ defined([31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m) case CPU_QEMU_GENERIC: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS64_R1[0m case CPU_5KC: case CPU_5KE: case CPU_20KC: case CPU_25KF: case CPU_SB1: case CPU_SB1A: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS64_R2[0m /* * All MIPS64 R2 processors have their own special symbols. That is, * there currently is no pure R2 core */ #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS32_R6[0m case CPU_M6250: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_MIPS64_R6[0m case CPU_I6400: case CPU_P6600: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R3000[0m case CPU_R2000: case CPU_R3000: case CPU_R3000A: case CPU_R3041: case CPU_R3051: case CPU_R3052: case CPU_R3081: case CPU_R3081E: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_TX39XX[0m case CPU_TX3912: case CPU_TX3922: case CPU_TX3927: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_VR41XX[0m case CPU_VR41XX: case CPU_VR4111: case CPU_VR4121: case CPU_VR4122: case CPU_VR4131: case CPU_VR4133: case CPU_VR4181: case CPU_VR4181A: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R4300[0m case CPU_R4300: case CPU_R4310: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R4X00[0m case CPU_R4000PC: case CPU_R4000SC: case CPU_R4000MC: case CPU_R4200: case CPU_R4400PC: case CPU_R4400SC: case CPU_R4400MC: case CPU_R4600: case CPU_R4700: case CPU_R4640: case CPU_R4650: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_TX49XX[0m case CPU_TX49XX: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R5000[0m case CPU_R5000: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R5432[0m case CPU_R5432: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R5500[0m case CPU_R5500: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R6000[0m case CPU_R6000: case CPU_R6000A: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_NEVADA[0m case CPU_NEVADA: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R8000[0m case CPU_R8000: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_R10000[0m case CPU_R10000: case CPU_R12000: case CPU_R14000: case CPU_R16000: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_RM7000[0m case CPU_RM7000: case CPU_SR71000: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_SB1[0m case CPU_SB1: case CPU_SB1A: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_CAVIUM_OCTEON[0m case CPU_CAVIUM_OCTEON: case CPU_CAVIUM_OCTEON_PLUS: case CPU_CAVIUM_OCTEON2: case CPU_CAVIUM_OCTEON3: #endif #if defined([31mCONFIG_SYS_HAS_CPU_BMIPS32_3300[0m) || \ defined ([31mCONFIG_SYS_HAS_CPU_MIPS32_R1[0m) case CPU_BMIPS32: case CPU_BMIPS3300: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_BMIPS4350[0m case CPU_BMIPS4350: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_BMIPS4380[0m case CPU_BMIPS4380: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_BMIPS5000[0m case CPU_BMIPS5000: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_XLP[0m case CPU_XLP: #endif #ifdef [31mCONFIG_SYS_HAS_CPU_XLR[0m case CPU_XLR: #endif break; default: unreachable(); } return cpu_type; } static inline int __pure current_cpu_type(void) { const int cpu_type = current_cpu_data.cputype; return __get_cpu_type(cpu_type); } static inline int __pure boot_cpu_type(void) { const int cpu_type = cpu_data[0].cputype; return __get_cpu_type(cpu_type); } #endif /* __ASM_CPU_TYPE_H */ |