/*
 * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
 *
 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *	 notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *	 notice, this list of conditions and the following disclaimer in the
 *	 documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *	 names of its contributors may be used to endorse or promote products
 *	 derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

fman@400000 {
	fman0_rx_0x11: port@91000 {
		cell-index = <0x11>;
		compatible = "fsl,fman-v3-port-rx";
		reg = <0x91000 0x1000>;
		fsl,fman-10g-port;
	};

	fman0_tx_0x31: port@b1000 {
		cell-index = <0x31>;
		compatible = "fsl,fman-v3-port-tx";
		reg = <0xb1000 0x1000>;
		fsl,fman-10g-port;
	};

	ethernet@f2000 {
		cell-index = <0x9>;
		compatible = "fsl,fman-memac";
		reg = <0xf2000 0x1000>;
		fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
		pcsphy-handle = <&pcsphy7>;
	};

	mdio@f3000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
		reg = <0xf3000 0x1000>;

		pcsphy7: ethernet-phy@0 {
			reg = <0x0>;
		};
	};
};