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#
# Broadcom pinctrl drivers
#

config CONFIG_PINCTRL_BCM281XX
	bool "Broadcom BCM281xx pinctrl driver"
	depends on CONFIG_OF && (CONFIG_ARCH_BCM_MOBILE || CONFIG_COMPILE_TEST)
	select CONFIG_PINMUX
	select CONFIG_PINCONF
	select CONFIG_GENERIC_PINCONF
	select CONFIG_REGMAP_MMIO
	default CONFIG_ARCH_BCM_MOBILE
	help
	  Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
	  for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
	  BCM28145, and BCM28155 SoCs.  This driver requires the pinctrl
	  framework.  GPIO is provided by a separate GPIO driver.

config CONFIG_PINCTRL_BCM2835
	bool
	select CONFIG_PINMUX
	select CONFIG_PINCONF
	select CONFIG_GPIOLIB_IRQCHIP

config CONFIG_PINCTRL_IPROC_GPIO
	bool "Broadcom iProc GPIO (with PINCONF) driver"
	depends on CONFIG_OF_GPIO && (CONFIG_ARCH_BCM_IPROC || CONFIG_COMPILE_TEST)
	select CONFIG_GPIOLIB_IRQCHIP
	select CONFIG_PINCONF
	select CONFIG_GENERIC_PINCONF
	default CONFIG_ARCH_BCM_IPROC
	help
	  Say yes here to enable the Broadcom iProc GPIO driver.

	  The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
	  same GPIO Controller IP hence this driver could be used for all.

	  The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
	  GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
	  the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
	  supported by this driver.

	  The Broadcom NSP has two GPIO controllers including the ChipcommonA
	  GPIO, the ChipcommonB GPIO. Later controller is supported by this
	  driver.

	  The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
	  the ChipcommonG GPIO. Both controllers are supported by this driver.

	  The Broadcom Stingray GPIO controllers are supported by this driver.

	  All above SoCs GPIO controllers support basic CONFIG_PINCONF functions such
	  as bias pull up, pull down, and drive strength configurations, when
	  these pins are muxed to GPIO.

	  It provides the framework where pins from the individual GPIO can be
	  individually muxed to GPIO function, through interaction with the
	  SoCs IOMUX controller. This features could be used only on SoCs which
	  support individual pin muxing.

config CONFIG_PINCTRL_CYGNUS_MUX
	bool "Broadcom Cygnus IOMUX driver"
	depends on (CONFIG_ARCH_BCM_CYGNUS || CONFIG_COMPILE_TEST)
	depends on CONFIG_OF
	select CONFIG_PINMUX
	select CONFIG_GENERIC_PINCONF
	default CONFIG_ARCH_BCM_CYGNUS
	help
	  Say yes here to enable the Broadcom Cygnus IOMUX driver.

	  The Broadcom Cygnus IOMUX driver supports group based IOMUX
	  configuration, with the exception that certain individual pins
	  can be overrided to GPIO function

config CONFIG_PINCTRL_NSP_GPIO
	bool "Broadcom NSP GPIO (with PINCONF) driver"
	depends on CONFIG_OF_GPIO && (CONFIG_ARCH_BCM_NSP || CONFIG_COMPILE_TEST)
	select CONFIG_GPIOLIB_IRQCHIP
	select CONFIG_PINCONF
	select CONFIG_GENERIC_PINCONF
	default CONFIG_ARCH_BCM_NSP
	help
	  Say yes here to enable the Broadcom NSP GPIO driver.

	  The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
	  supported by this driver.

	  The ChipcommonA GPIO controller support basic CONFIG_PINCONF functions such
	  as bias pull up, pull down, and drive strength configurations, when
	  these pins are muxed to GPIO.

config CONFIG_PINCTRL_NS2_MUX
	bool "Broadcom Northstar2 pinmux driver"
	depends on CONFIG_OF
	depends on CONFIG_ARCH_BCM_IPROC || CONFIG_COMPILE_TEST
	select CONFIG_PINMUX
	select CONFIG_GENERIC_PINCONF
	default CONFIG_ARM64 && CONFIG_ARCH_BCM_IPROC
	help
	  Say yes here to enable the Broadcom NS2 MUX driver.

	  The Broadcom Northstar2 IOMUX driver supports group based IOMUX
	  configuration.

config CONFIG_PINCTRL_NSP_MUX
	bool "Broadcom NSP IOMUX driver"
	depends on (CONFIG_ARCH_BCM_NSP || CONFIG_COMPILE_TEST)
	depends on CONFIG_OF
	select CONFIG_PINMUX
	select CONFIG_GENERIC_PINCONF
	default CONFIG_ARCH_BCM_NSP
	help
	  Say yes here to enable the Broadcom NSP SOC IOMUX driver.

	  The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
	  configuration, with certain individual pins can be overridden
	  to GPIO function.