#
# Memory devices
#
menuconfig [31mCONFIG_MEMORY[0m
bool "Memory Controller drivers"
if [31mCONFIG_MEMORY[0m
config [31mCONFIG_ARM_PL172_MPMC[0m
tristate "ARM PL172 MPMC driver"
depends on [31mCONFIG_ARM_AMBA[0m && [31mCONFIG_OF[0m
help
This selects the [31mCONFIG_ARM[0m PrimeCell PL172 MultiPort Memory Controller.
If you have an embedded system with an AMBA bus and a PL172
controller, say Y or [31mCONFIG_M[0m here.
config [31mCONFIG_ATMEL_SDRAMC[0m
bool "Atmel (Multi-port DDR-)SDRAM Controller"
default y
depends on [31mCONFIG_ARCH_AT91[0m && [31mCONFIG_OF[0m
help
This driver is for Atmel SDRAM Controller or Atmel Multi-port
[31mCONFIG_DDR[0m-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
Starting with the at91sam9g45, this controller supports SDR, [31mCONFIG_DDR[0m and
LP-[31mCONFIG_DDR[0m memories.
config [31mCONFIG_ATMEL_EBI[0m
bool "Atmel EBI driver"
default y
depends on [31mCONFIG_ARCH_AT91[0m && [31mCONFIG_OF[0m
select [31mCONFIG_MFD_SYSCON[0m
help
Driver for Atmel EBI controller.
Used to configure the EBI (external bus interface) when the device-
tree is used. This bus supports NANDs, external ethernet controller,
SRAMs, [31mCONFIG_ATA[0m devices, etc.
config [31mCONFIG_TI_AEMIF[0m
tristate "Texas Instruments AEMIF driver"
depends on ([31mCONFIG_ARCH_DAVINCI[0m || [31mCONFIG_ARCH_KEYSTONE[0m) && [31mCONFIG_OF[0m
help
This driver is for the AEMIF module available in Texas Instruments
SoCs. AEMIF stands for Asynchronous External Memory Interface and
is intended to provide a glue-less interface to a variety of
asynchronuous memory devices like ASRAM, NOR and NAND memory. [31mCONFIG_A[0m total
of 256M bytes of any of these memories can be accessed at a given
time via four chip selects with 64M byte access per chip select.
config [31mCONFIG_TI_EMIF[0m
tristate "Texas Instruments EMIF driver"
depends on [31mCONFIG_ARCH_OMAP2PLUS[0m
select [31mCONFIG_DDR[0m
help
This driver is for the EMIF module available in Texas Instruments
SoCs. EMIF is an SDRAM controller that, based on its revision,
supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
This driver takes care of only LPDDR2 memories presently. The
functions of the driver includes re-configuring AC timing
parameters and other settings during frequency, voltage and
temperature changes
config [31mCONFIG_OMAP_GPMC[0m
bool
select [31mCONFIG_GPIOLIB[0m
help
This driver is for the General Purpose Memory Controller (GPMC)
present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
interfacing to a variety of asynchronous as well as synchronous
memory drives like NOR, NAND, OneNAND, [31mCONFIG_SRAM[0m.
config [31mCONFIG_OMAP_GPMC_DEBUG[0m
bool "Enable GPMC debug output and skip reset of GPMC during init"
depends on [31mCONFIG_OMAP_GPMC[0m
help
Enables verbose debugging mostly to decode the bootloader provided
timings. To preserve the bootloader provided timings, the reset
of GPMC is skipped during init. Enable this during development to
configure devices connected to the GPMC bus.
NOTE: In addition to matching the register setup with the bootloader
you also need to match the GPMC FCLK frequency used by the
bootloader or else the GPMC timings won't be identical with the
bootloader timings.
config [31mCONFIG_MVEBU_DEVBUS[0m
bool "Marvell EBU Device Bus Controller"
default y
depends on [31mCONFIG_PLAT_ORION[0m && [31mCONFIG_OF[0m
help
This driver is for the Device Bus controller available in some
Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
Armada 370 and Armada XP. This controller allows to handle flash
devices such as NOR, NAND, [31mCONFIG_SRAM[0m, and [31mCONFIG_FPGA[0m.
config [31mCONFIG_TEGRA20_MC[0m
bool "Tegra20 Memory Controller(MC) driver"
default y
depends on [31mCONFIG_ARCH_TEGRA_2x_SOC[0m
help
This driver is for the Memory Controller(MC) module available
in Tegra20 SoCs, mainly for a address translation fault
analysis, especially for IOMMU/GART(Graphics Address
Relocation Table) module.
config [31mCONFIG_FSL_CORENET_CF[0m
tristate "Freescale CoreNet Error Reporting"
depends on [31mCONFIG_FSL_SOC_BOOKE[0m
help
Say Y for reporting of errors from the Freescale CoreNet
Coherency Fabric. Errors reported include accesses to
physical addresses that mapped by no local access window
(LAW) or an invalid LAW, as well as bad cache state that
represents a coherency violation.
config [31mCONFIG_FSL_IFC[0m
bool
depends on [31mCONFIG_FSL_SOC[0m || [31mCONFIG_ARCH_LAYERSCAPE[0m
config [31mCONFIG_JZ4780_NEMC[0m
bool "Ingenic JZ4780 SoC NEMC driver"
default y
depends on [31mCONFIG_MACH_JZ4780[0m
help
This driver is for the NAND/External Memory Controller (NEMC) in
the Ingenic JZ4780. This controller is used to handle external
memory devices such as NAND and [31mCONFIG_SRAM[0m.
config [31mCONFIG_MTK_SMI[0m
bool
depends on [31mCONFIG_ARCH_MEDIATEK[0m || [31mCONFIG_COMPILE_TEST[0m
help
This driver is for the Memory Controller module in MediaTek SoCs,
mainly help enable/disable iommu and control the power domain and
clocks for each local arbiter.
config [31mCONFIG_DA8XX_DDRCTL[0m
bool "Texas Instruments da8xx DDR2/mDDR driver"
depends on [31mCONFIG_ARCH_DAVINCI_DA8XX[0m
help
This driver is for the DDR2/mDDR Memory Controller present on
Texas Instruments da8xx SoCs. It's used to tweak various memory
controller configuration options.
source "drivers/memory/samsung/Kconfig"
source "drivers/memory/tegra/Kconfig"
endif