Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 5305 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 5497 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 4713 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 5683 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 5841 (as a macro)