/* * Common Clock definitions for various kernel files * * Copyright 2007-2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef _BFIN_CLOCKS_H #define _BFIN_CLOCKS_H #include <asm/dpmc.h> #ifdef [31mCONFIG_CCLK_DIV_1[0m # define CONFIG_CCLK_ACT_DIV CCLK_DIV1 # define CONFIG_CCLK_DIV 1 #endif #ifdef [31mCONFIG_CCLK_DIV_2[0m # define CONFIG_CCLK_ACT_DIV CCLK_DIV2 # define CONFIG_CCLK_DIV 2 #endif #ifdef [31mCONFIG_CCLK_DIV_4[0m # define CONFIG_CCLK_ACT_DIV CCLK_DIV4 # define CONFIG_CCLK_DIV 4 #endif #ifdef [31mCONFIG_CCLK_DIV_8[0m # define CONFIG_CCLK_ACT_DIV CCLK_DIV8 # define CONFIG_CCLK_DIV 8 #endif #ifndef [31mCONFIG_PLL_BYPASS[0m # ifndef [31mCONFIG_CLKIN_HALF[0m # define CONFIG_VCO_HZ ([31mCONFIG_CLKIN_HZ[0m * [31mCONFIG_VCO_MULT[0m) # else # define CONFIG_VCO_HZ (([31mCONFIG_CLKIN_HZ[0m * [31mCONFIG_VCO_MULT[0m)/2) # endif # define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV) # define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/[31mCONFIG_SCLK_DIV[0m) #else # define CONFIG_VCO_HZ ([31mCONFIG_CLKIN_HZ[0m) # define CONFIG_CCLK_HZ ([31mCONFIG_CLKIN_HZ[0m) # define CONFIG_SCLK_HZ ([31mCONFIG_CLKIN_HZ[0m) # define [31mCONFIG_VCO_MULT[0m 0 #endif #include <linux/clk.h> struct clk_ops { unsigned long (*get_rate)(struct clk *clk); unsigned long (*round_rate)(struct clk *clk, unsigned long rate); int (*set_rate)(struct clk *clk, unsigned long rate); int (*enable)(struct clk *clk); int (*disable)(struct clk *clk); }; struct clk { struct clk *parent; const char *name; unsigned long rate; spinlock_t lock; u32 flags; const struct clk_ops *ops; void __iomem *reg; u32 mask; u32 shift; }; int clk_init(void); #endif |