config [31mCONFIG_CLKDEV_LOOKUP[0m
bool
select [31mCONFIG_HAVE_CLK[0m
config [31mCONFIG_HAVE_CLK_PREPARE[0m
bool
config [31mCONFIG_COMMON_CLK[0m
bool
select [31mCONFIG_HAVE_CLK_PREPARE[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
select [31mCONFIG_SRCU[0m
select [31mCONFIG_RATIONAL[0m
---help---
The common clock framework is a single definition of struct
clk, useful across many platforms, as well as an
implementation of the clock API in include/linux/clk.h.
Architectures utilizing the common struct clk should select
this option.
menu "Common Clock Framework"
depends on [31mCONFIG_COMMON_CLK[0m
config [31mCONFIG_COMMON_CLK_WM831X[0m
tristate "Clock driver for WM831x/2x PMICs"
depends on [31mCONFIG_MFD_WM831X[0m
---help---
Supports the clocking subsystem of the WM831x/2x series of
PMICs from Wolfson Microelectronics.
source "drivers/clk/versatile/Kconfig"
config [31mCONFIG_COMMON_CLK_MAX77686[0m
tristate "Clock driver for Maxim 77620/77686/77802 MFD"
depends on [31mCONFIG_MFD_MAX77686[0m || [31mCONFIG_MFD_MAX77620[0m || [31mCONFIG_COMPILE_TEST[0m
---help---
This driver supports Maxim 77620/77686/77802 crystal oscillator
clock.
config [31mCONFIG_COMMON_CLK_RK808[0m
tristate "Clock driver for RK808/RK818"
depends on [31mCONFIG_MFD_RK808[0m
---help---
This driver supports RK808 and RK818 crystal oscillator clock. These
multi-function devices have two fixed-rate oscillators,
clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
by control register.
config [31mCONFIG_COMMON_CLK_SCPI[0m
tristate "Clock driver controlled via SCPI interface"
depends on [31mCONFIG_ARM_SCPI_PROTOCOL[0m || [31mCONFIG_COMPILE_TEST[0m
---help---
This driver provides support for clocks that are controlled
by firmware that implements the SCPI interface.
This driver uses SCPI Message Protocol to interact with the
firmware providing all the clock controls.
config [31mCONFIG_COMMON_CLK_SI5351[0m
tristate "Clock driver for SiLabs 5351A/B/C"
depends on [31mCONFIG_I2C[0m
select [31mCONFIG_REGMAP_I2C[0m
select [31mCONFIG_RATIONAL[0m
---help---
This driver supports Silicon Labs 5351A/[31mCONFIG_B[0m/[31mCONFIG_C[0m programmable clock
generators.
config [31mCONFIG_COMMON_CLK_SI514[0m
tristate "Clock driver for SiLabs 514 devices"
depends on [31mCONFIG_I2C[0m
depends on [31mCONFIG_OF[0m
select [31mCONFIG_REGMAP_I2C[0m
help
---help---
This driver supports the Silicon Labs 514 programmable clock
generator.
config [31mCONFIG_COMMON_CLK_SI570[0m
tristate "Clock driver for SiLabs 570 and compatible devices"
depends on [31mCONFIG_I2C[0m
depends on [31mCONFIG_OF[0m
select [31mCONFIG_REGMAP_I2C[0m
help
---help---
This driver supports Silicon Labs 570/571/598/599 programmable
clock generators.
config [31mCONFIG_COMMON_CLK_CDCE706[0m
tristate "Clock driver for TI CDCE706 clock synthesizer"
depends on [31mCONFIG_I2C[0m
select [31mCONFIG_REGMAP_I2C[0m
select [31mCONFIG_RATIONAL[0m
---help---
This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
config [31mCONFIG_COMMON_CLK_CDCE925[0m
tristate "Clock driver for TI CDCE925 devices"
depends on [31mCONFIG_I2C[0m
depends on [31mCONFIG_OF[0m
select [31mCONFIG_REGMAP_I2C[0m
help
---help---
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following setup,
and uses a fixed setting for the output muxes.
Y1 is derived from the input clock
Y2 and Y3 derive from PLL1
Y4 and Y5 derive from PLL2
Given a target output frequency, the driver will set the PLL and
divider to best approximate the desired output.
config [31mCONFIG_COMMON_CLK_CS2000_CP[0m
tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
depends on [31mCONFIG_I2C[0m
help
If you say yes here you get support for the CS2000 clock multiplier.
config [31mCONFIG_COMMON_CLK_S2MPS11[0m
tristate "Clock driver for S2MPS1X/S5M8767 MFD"
depends on [31mCONFIG_MFD_SEC_CORE[0m || [31mCONFIG_COMPILE_TEST[0m
---help---
This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
clock. These multi-function devices have two (S2MPS14) or three
(S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
config [31mCONFIG_CLK_TWL6040[0m
tristate "External McPDM functional clock from twl6040"
depends on [31mCONFIG_TWL6040_CORE[0m
---help---
Enable the external functional clock support on OMAP4+ platforms for
McPDM. McPDM module is using the external bit clock on the McPDM bus
as functional clock.
config [31mCONFIG_COMMON_CLK_AXI_CLKGEN[0m
tristate "AXI clkgen driver"
depends on [31mCONFIG_ARCH_ZYNQ[0m || [31mCONFIG_MICROBLAZE[0m || [31mCONFIG_COMPILE_TEST[0m
help
---help---
Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.
config [31mCONFIG_CLK_QORIQ[0m
bool "Clock driver for Freescale QorIQ platforms"
depends on ([31mCONFIG_PPC_E500MC[0m || [31mCONFIG_ARM[0m || [31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m) && [31mCONFIG_OF[0m
---help---
This adds the clock driver support for Freescale QorIQ platforms
using common clock framework.
config [31mCONFIG_COMMON_CLK_XGENE[0m
bool "Clock driver for APM XGene SoC"
default y
depends on [31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m
---help---
Sypport for the [31mCONFIG_APM[0m X-Gene SoC reference, PLL, and device clocks.
config [31mCONFIG_COMMON_CLK_KEYSTONE[0m
tristate "Clock drivers for Keystone based SOCs"
depends on ([31mCONFIG_ARCH_KEYSTONE[0m || [31mCONFIG_COMPILE_TEST[0m) && [31mCONFIG_OF[0m
---help---
Supports clock drivers for Keystone based SOCs. These SOCs have local
a power sleep control module that gate the clock to the IPs and PLLs.
config [31mCONFIG_COMMON_CLK_NXP[0m
def_bool [31mCONFIG_COMMON_CLK[0m && ([31mCONFIG_ARCH_LPC18XX[0m || [31mCONFIG_ARCH_LPC32XX[0m)
select [31mCONFIG_REGMAP_MMIO[0m if [31mCONFIG_ARCH_LPC32XX[0m
select [31mCONFIG_MFD_SYSCON[0m if [31mCONFIG_ARCH_LPC18XX[0m
---help---
Support for clock providers on NXP platforms.
config [31mCONFIG_COMMON_CLK_PALMAS[0m
tristate "Clock driver for TI Palmas devices"
depends on [31mCONFIG_MFD_PALMAS[0m
---help---
This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
using common clock framework.
config [31mCONFIG_COMMON_CLK_PWM[0m
tristate "Clock driver for PWMs used as clock outputs"
depends on [31mCONFIG_PWM[0m
---help---
Adapter driver so that any [31mCONFIG_PWM[0m output can be (mis)used as clock signal
at 50% duty cycle.
config [31mCONFIG_COMMON_CLK_PXA[0m
def_bool [31mCONFIG_COMMON_CLK[0m && [31mCONFIG_ARCH_PXA[0m
---help---
Support for the Marvell PXA SoC.
config [31mCONFIG_COMMON_CLK_PIC32[0m
def_bool [31mCONFIG_COMMON_CLK[0m && [31mCONFIG_MACH_PIC32[0m
config [31mCONFIG_COMMON_CLK_OXNAS[0m
bool "Clock driver for the OXNAS SoC Family"
depends on [31mCONFIG_ARCH_OXNAS[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_MFD_SYSCON[0m
---help---
Support for the OXNAS SoC Family clocks.
source "drivers/clk/bcm/Kconfig"
source "drivers/clk/hisilicon/Kconfig"
source "drivers/clk/mediatek/Kconfig"
source "drivers/clk/meson/Kconfig"
source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sunxi-ng/Kconfig"
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
source "drivers/clk/uniphier/Kconfig"
endmenu