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Elixir Cross Referencer

Trusted Computing Group MMIO Trusted Platform Module

The TCG defines multi vendor standard for accessing a TPM chip, this
is the standard protocol defined to access the TPM via MMIO. Typically
this interface will be implemented over Intel's LPC bus.

Refer to the 'TCG PC Client Specific TPM Interface Specification (TIS)' TCG
publication for the specification.

Required properties:

- compatible: should contain a string below for the chip, followed by
              "tcg,tpm-tis-mmio". Valid chip strings are:
	          * "atmel,at97sc3204"
- reg: The location of the MMIO registers, should be at least 0x5000 bytes
- interrupt-parent/interrupts: An optional interrupt indicating command completion.

Example:

	tpm_tis@90000 {
				compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio";
				reg = <0x90000 0x5000>;
				interrupt-parent = <&EIC0>;
				interrupts = <1 2>;
	};