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Elixir Cross Referencer

J-Core Advanced Interrupt Controller

Required properties:

- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic
  with 8 interrupt lines with programmable priorities, or "jcore,aic2" for
  the "aic2" core with 64 interrupts.

- reg: Memory region(s) for configuration. For SMP, there should be one
  region per cpu, indexed by the sequential, zero-based hardware cpu
  number.

- interrupt-controller: Identifies the node as an interrupt controller

- #interrupt-cells: Specifies the number of cells needed to encode an
  interrupt source. The value shall be 1.


Example:

aic: interrupt-controller@200 {
	compatible = "jcore,aic2";
	reg = < 0x200 0x30 0x500 0x30 >;
	interrupt-controller;
	#interrupt-cells = <1>;
};