/* * This file defines the fixed addresses where userspace programs * can find atomic code sequences. * * Copyright 2007-2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef _UAPI__BFIN_ASM_FIXED_CODE_H__ #define _UAPI__BFIN_ASM_FIXED_CODE_H__ #ifndef [31mCONFIG_PHY_RAM_BASE_ADDRESS[0m #define [31mCONFIG_PHY_RAM_BASE_ADDRESS[0m 0x0 #endif #define FIXED_CODE_START ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x400) #define SIGRETURN_STUB ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x400) #define ATOMIC_SEQS_START ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x410) #define ATOMIC_XCHG32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x410) #define ATOMIC_CAS32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x420) #define ATOMIC_ADD32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x430) #define ATOMIC_SUB32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x440) #define ATOMIC_IOR32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x450) #define ATOMIC_AND32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x460) #define ATOMIC_XOR32 ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x470) #define ATOMIC_SEQS_END ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x480) #define SAFE_USER_INSTRUCTION ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x480) #define FIXED_CODE_END ([31mCONFIG_PHY_RAM_BASE_ADDRESS[0m + 0x490) #endif /* _UAPI__BFIN_ASM_FIXED_CODE_H__ */ |