#
# [31mCONFIG_SPI[0m driver configuration
#
# NOTE: the reason this doesn't show [31mCONFIG_SPI[0m slave support is mostly that
# nobody's needed a slave side API yet. The master-role API is not
# fully appropriate there, so it'd need some thought to do well.
#
menuconfig [31mCONFIG_SPI[0m
bool "SPI support"
depends on [31mCONFIG_HAS_IOMEM[0m
help
The "Serial Peripheral Interface" is a low level synchronous
protocol. Chips that support [31mCONFIG_SPI[0m can have data transfer rates
up to several tens of Mbit/sec. Chips are addressed with a
controller and a chipselect. Most [31mCONFIG_SPI[0m slaves don't support
dynamic device discovery; some are even write-only or read-only.
[31mCONFIG_SPI[0m is widely used by microcontrollers to talk with sensors,
eeprom and flash memory, codecs and various other controller
chips, analog to digital (and d-to-a) converters, and more.
[31mCONFIG_MMC[0m and SD cards can be accessed using [31mCONFIG_SPI[0m protocol; and for
DataFlash cards used in [31mCONFIG_MMC[0m sockets, [31mCONFIG_SPI[0m must always be used.
[31mCONFIG_SPI[0m is one of a family of similar protocols using a four wire
interface (select, clock, data in, data out) including Microwire
(half duplex), SSP, SSI, and PSP. This driver framework should
work with most such devices and controllers.
if [31mCONFIG_SPI[0m
config [31mCONFIG_SPI_DEBUG[0m
bool "Debug support for SPI drivers"
depends on [31mCONFIG_DEBUG_KERNEL[0m
help
Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
sysfs, and debugfs support in [31mCONFIG_SPI[0m controller and protocol drivers.
#
# MASTER side ... talking to discrete [31mCONFIG_SPI[0m slave chips including microcontrollers
#
config [31mCONFIG_SPI_MASTER[0m
# bool "SPI Master Support"
bool
default [31mCONFIG_SPI[0m
help
If your system has an master-capable [31mCONFIG_SPI[0m controller (which
provides the clock and chipselect), you can enable that
controller and the protocol drivers for the [31mCONFIG_SPI[0m slave chips
that are connected.
if [31mCONFIG_SPI_MASTER[0m
comment "SPI Master Controller Drivers"
config [31mCONFIG_SPI_ALTERA[0m
tristate "Altera SPI Controller"
select [31mCONFIG_SPI_BITBANG[0m
help
This is the driver for the Altera [31mCONFIG_SPI[0m Controller.
config [31mCONFIG_SPI_ATH79[0m
tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
depends on [31mCONFIG_ATH79[0m && [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This enables support for the [31mCONFIG_SPI[0m controller present on the
Atheros AR71XX/AR724X/AR913X SoCs.
config [31mCONFIG_SPI_ARMADA_3700[0m
tristate "Marvell Armada 3700 SPI Controller"
depends on ([31mCONFIG_ARCH_MVEBU[0m && [31mCONFIG_OF[0m) || [31mCONFIG_COMPILE_TEST[0m
help
This enables support for the [31mCONFIG_SPI[0m controller present on the
Marvell Armada 3700 SoCs.
config [31mCONFIG_SPI_ATMEL[0m
tristate "Atmel SPI Controller"
depends on [31mCONFIG_HAS_DMA[0m
depends on ([31mCONFIG_ARCH_AT91[0m || [31mCONFIG_AVR32[0m || [31mCONFIG_COMPILE_TEST[0m)
help
This selects a driver for the Atmel [31mCONFIG_SPI[0m Controller, present on
many AT32 ([31mCONFIG_AVR32[0m) and AT91 ([31mCONFIG_ARM[0m) chips.
config [31mCONFIG_SPI_AU1550[0m
tristate "Au1550/Au1200/Au1300 SPI Controller"
depends on [31mCONFIG_MIPS_ALCHEMY[0m
select [31mCONFIG_SPI_BITBANG[0m
help
If you say yes to this option, support will be included for the
PSC [31mCONFIG_SPI[0m controller found on Au1550, Au1200 and Au1300 series.
config [31mCONFIG_SPI_AXI_SPI_ENGINE[0m
tristate "Analog Devices AXI SPI Engine controller"
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables support for the Analog Devices AXI [31mCONFIG_SPI[0m Engine [31mCONFIG_SPI[0m controller.
It is part of the [31mCONFIG_SPI[0m Engine framework that is used in some Analog Devices
reference designs for FPGAs.
config [31mCONFIG_SPI_BCM2835[0m
tristate "BCM2835 SPI controller"
depends on [31mCONFIG_GPIOLIB[0m
depends on [31mCONFIG_ARCH_BCM2835[0m || [31mCONFIG_COMPILE_TEST[0m
help
This selects a driver for the Broadcom BCM2835 [31mCONFIG_SPI[0m master.
The BCM2835 contains two types of [31mCONFIG_SPI[0m master controller; the
"universal SPI master", and the regular [31mCONFIG_SPI[0m controller. This driver
is for the regular [31mCONFIG_SPI[0m controller. Slave mode operation is not also
not supported.
config [31mCONFIG_SPI_BCM2835AUX[0m
tristate "BCM2835 SPI auxiliary controller"
depends on ([31mCONFIG_ARCH_BCM2835[0m && [31mCONFIG_GPIOLIB[0m) || [31mCONFIG_COMPILE_TEST[0m
help
This selects a driver for the Broadcom BCM2835 [31mCONFIG_SPI[0m aux master.
The BCM2835 contains two types of [31mCONFIG_SPI[0m master controller; the
"universal SPI master", and the regular [31mCONFIG_SPI[0m controller.
This driver is for the universal/auxiliary [31mCONFIG_SPI[0m controller.
config [31mCONFIG_SPI_BFIN5XX[0m
tristate "SPI controller driver for ADI Blackfin5xx"
depends on [31mCONFIG_BLACKFIN[0m && ![31mCONFIG_BF60x[0m
help
This is the [31mCONFIG_SPI[0m controller master driver for Blackfin 5xx processor.
config [31mCONFIG_SPI_ADI_V3[0m
tristate "SPI controller v3 for ADI"
depends on [31mCONFIG_BF60x[0m
help
This is the [31mCONFIG_SPI[0m controller v3 master driver
found on Blackfin 60x processor.
config [31mCONFIG_SPI_BFIN_SPORT[0m
tristate "SPI bus via Blackfin SPORT"
depends on [31mCONFIG_BLACKFIN[0m
help
Enable support for a [31mCONFIG_SPI[0m bus via the Blackfin SPORT peripheral.
config [31mCONFIG_SPI_BCM53XX[0m
tristate "Broadcom BCM53xx SPI controller"
depends on [31mCONFIG_ARCH_BCM_5301X[0m
depends on [31mCONFIG_BCMA_POSSIBLE[0m
select [31mCONFIG_BCMA[0m
help
Enable support for the [31mCONFIG_SPI[0m controller on Broadcom BCM53xx [31mCONFIG_ARM[0m SoCs.
config [31mCONFIG_SPI_BCM63XX[0m
tristate "Broadcom BCM63xx SPI controller"
depends on [31mCONFIG_BCM63XX[0m || [31mCONFIG_COMPILE_TEST[0m
help
Enable support for the [31mCONFIG_SPI[0m controller on the Broadcom BCM63xx SoCs.
config [31mCONFIG_SPI_BCM63XX_HSSPI[0m
tristate "Broadcom BCM63XX HS SPI controller driver"
depends on [31mCONFIG_BCM63XX[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables support for the High Speed [31mCONFIG_SPI[0m controller present on
newer Broadcom [31mCONFIG_BCM63XX[0m SoCs.
config [31mCONFIG_SPI_BCM_QSPI[0m
tristate "Broadcom BSPI and MSPI controller support"
depends on [31mCONFIG_ARCH_BRCMSTB[0m || [31mCONFIG_ARCH_BCM[0m || [31mCONFIG_ARCH_BCM_IPROC[0m || [31mCONFIG_COMPILE_TEST[0m
default [31mCONFIG_ARCH_BCM_IPROC[0m
help
Enables support for the Broadcom [31mCONFIG_SPI[0m flash and MSPI controller.
Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
based platforms. This driver works for both [31mCONFIG_SPI[0m master for spi-nor
flash device as well as MSPI device.
config [31mCONFIG_SPI_BITBANG[0m
tristate "Utilities for Bitbanging SPI masters"
help
With a few GPIO pins, your system can bitbang the [31mCONFIG_SPI[0m protocol.
Select this to get [31mCONFIG_SPI[0m support through I/O pins (GPIO, parallel
port, etc). Or, some systems' [31mCONFIG_SPI[0m master controller drivers use
this code to manage the per-word or per-transfer accesses to the
hardware shift registers.
This is library code, and is automatically selected by drivers that
need it. You only need to select this explicitly to support driver
modules that aren't part of this kernel tree.
config [31mCONFIG_SPI_BUTTERFLY[0m
tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
depends on [31mCONFIG_PARPORT[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This uses a custom parallel port cable to connect to an AVR
Butterfly <http://www.atmel.com/products/avr/butterfly>, an
inexpensive battery powered microcontroller evaluation board.
This same cable can be used to flash new firmware.
config [31mCONFIG_SPI_CADENCE[0m
tristate "Cadence SPI controller"
help
This selects the Cadence [31mCONFIG_SPI[0m controller master driver
used by Xilinx Zynq and ZynqMP.
config [31mCONFIG_SPI_CLPS711X[0m
tristate "CLPS711X host SPI controller"
depends on [31mCONFIG_ARCH_CLPS711X[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables dedicated general purpose [31mCONFIG_SPI[0m/Microwire1-compatible
master mode interface (SSI1) for CLPS711X-based CPUs.
config [31mCONFIG_SPI_COLDFIRE_QSPI[0m
tristate "Freescale Coldfire QSPI controller"
depends on ([31mCONFIG_M520x[0m || [31mCONFIG_M523x[0m || [31mCONFIG_M5249[0m || [31mCONFIG_M525x[0m || [31mCONFIG_M527x[0m || [31mCONFIG_M528x[0m || [31mCONFIG_M532x[0m)
help
This enables support for the Coldfire QSPI controller in master
mode.
config [31mCONFIG_SPI_DAVINCI[0m
tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
depends on [31mCONFIG_ARCH_DAVINCI[0m || [31mCONFIG_ARCH_KEYSTONE[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m master controller for DaVinci/DA8x/OMAP-L/AM1x [31mCONFIG_SPI[0m modules.
config [31mCONFIG_SPI_DESIGNWARE[0m
tristate "DesignWare SPI controller core support"
help
general driver for [31mCONFIG_SPI[0m controller core from DesignWare
config [31mCONFIG_SPI_DW_PCI[0m
tristate "PCI interface driver for DW SPI core"
depends on [31mCONFIG_SPI_DESIGNWARE[0m && [31mCONFIG_PCI[0m
config [31mCONFIG_SPI_DW_MID_DMA[0m
bool "DMA support for DW SPI controller on Intel MID platform"
depends on [31mCONFIG_SPI_DW_PCI[0m && [31mCONFIG_DW_DMAC_PCI[0m
config [31mCONFIG_SPI_DW_MMIO[0m
tristate "Memory-mapped io interface driver for DW SPI core"
depends on [31mCONFIG_SPI_DESIGNWARE[0m
config [31mCONFIG_SPI_DLN2[0m
tristate "Diolan DLN-2 USB SPI adapter"
depends on [31mCONFIG_MFD_DLN2[0m
help
If you say yes to this option, support will be included for Diolan
DLN2, a [31mCONFIG_USB[0m to [31mCONFIG_SPI[0m interface.
This driver can also be built as a module. If so, the module
will be called spi-dln2.
config [31mCONFIG_SPI_EFM32[0m
tristate "EFM32 SPI controller"
depends on [31mCONFIG_OF[0m && [31mCONFIG_ARM[0m && ([31mCONFIG_ARCH_EFM32[0m || [31mCONFIG_COMPILE_TEST[0m)
select [31mCONFIG_SPI_BITBANG[0m
help
Driver for the spi controller found on Energy Micro's EFM32 SoCs.
config [31mCONFIG_SPI_EP93XX[0m
tristate "Cirrus Logic EP93xx SPI controller"
depends on [31mCONFIG_HAS_DMA[0m
depends on [31mCONFIG_ARCH_EP93XX[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables using the Cirrus EP93xx [31mCONFIG_SPI[0m controller in master
mode.
config [31mCONFIG_SPI_FALCON[0m
tristate "Falcon SPI controller support"
depends on [31mCONFIG_SOC_FALCON[0m
help
The external bus unit (EBU) found on the FALC-ON SoC has [31mCONFIG_SPI[0m
emulation that is designed for serial flash access. This driver
has only been tested with m25p80 type chips. The hardware has no
support for other types of [31mCONFIG_SPI[0m peripherals.
config [31mCONFIG_SPI_FSL_LPSPI[0m
tristate "Freescale i.MX LPSPI controller"
depends on [31mCONFIG_ARCH_MXC[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables Freescale i.MX LPSPI controllers in master mode.
config [31mCONFIG_SPI_GPIO[0m
tristate "GPIO-based bitbanging SPI Master"
depends on [31mCONFIG_GPIOLIB[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This simple GPIO bitbanging [31mCONFIG_SPI[0m master uses the arch-neutral GPIO
interface to manage MOSI, MISO, SCK, and chipselect signals. [31mCONFIG_SPI[0m
slaves connected to a bus using this driver are configured as usual,
except that the spi_board_info.controller_data holds the GPIO number
for the chipselect used by this controller driver.
Note that this driver often won't achieve even 1 Mbit/sec speeds,
making it unusually slow for [31mCONFIG_SPI[0m. If your platform can inline
GPIO operations, you should be able to leverage that for better
speed with a custom version of this driver; see the source code.
config [31mCONFIG_SPI_IMG_SPFI[0m
tristate "IMG SPFI controller"
depends on [31mCONFIG_MIPS[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables support for the SPFI master controller found on
IMG SoCs.
config [31mCONFIG_SPI_IMX[0m
tristate "Freescale i.MX SPI controllers"
depends on [31mCONFIG_ARCH_MXC[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This enables using the Freescale i.MX [31mCONFIG_SPI[0m controllers in master
mode.
config [31mCONFIG_SPI_JCORE[0m
tristate "J-Core SPI Master"
depends on [31mCONFIG_OF[0m && ([31mCONFIG_SUPERH[0m || [31mCONFIG_COMPILE_TEST[0m)
help
This enables support for the [31mCONFIG_SPI[0m master controller in the J-Core
synthesizable, open source SoC.
config [31mCONFIG_SPI_LM70_LLP[0m
tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
depends on [31mCONFIG_PARPORT[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This driver supports the NS LM70 LLP Evaluation Board,
which interfaces to an LM70 temperature sensor using
a parallel port.
config [31mCONFIG_SPI_LP8841_RTC[0m
tristate "ICP DAS LP-8841 SPI Controller for RTC"
depends on [31mCONFIG_MACH_PXA27X_DT[0m || [31mCONFIG_COMPILE_TEST[0m
help
This driver provides an [31mCONFIG_SPI[0m master device to drive Maxim
DS-1302 real time clock.
Say N here unless you plan to run the kernel on an ICP DAS
LP-8x4x industrial computer.
config [31mCONFIG_SPI_MPC52xx[0m
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
depends on [31mCONFIG_PPC_MPC52xx[0m
help
This drivers supports the MPC52xx [31mCONFIG_SPI[0m controller in master [31mCONFIG_SPI[0m
mode.
config [31mCONFIG_SPI_MPC52xx_PSC[0m
tristate "Freescale MPC52xx PSC SPI controller"
depends on [31mCONFIG_PPC_MPC52xx[0m
help
This enables using the Freescale MPC52xx Programmable Serial
Controller in master [31mCONFIG_SPI[0m mode.
config [31mCONFIG_SPI_MPC512x_PSC[0m
tristate "Freescale MPC512x PSC SPI controller"
depends on [31mCONFIG_PPC_MPC512x[0m
help
This enables using the Freescale MPC5121 Programmable Serial
Controller in [31mCONFIG_SPI[0m master mode.
config [31mCONFIG_SPI_FSL_LIB[0m
tristate
depends on [31mCONFIG_OF[0m
config [31mCONFIG_SPI_FSL_CPM[0m
tristate
depends on [31mCONFIG_FSL_SOC[0m
config [31mCONFIG_SPI_FSL_SPI[0m
tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
depends on [31mCONFIG_OF[0m
select [31mCONFIG_SPI_FSL_LIB[0m
select [31mCONFIG_SPI_FSL_CPM[0m if [31mCONFIG_FSL_SOC[0m
help
This enables using the Freescale [31mCONFIG_SPI[0m controllers in master mode.
MPC83xx platform uses the controller in cpu mode or [31mCONFIG_CPM[0m/QE mode.
MPC8569 uses the controller in QE mode, [31mCONFIG_MPC8610[0m in cpu mode.
This also enables using the Aeroflex Gaisler GRLIB [31mCONFIG_SPI[0m controller in
master mode.
config [31mCONFIG_SPI_FSL_DSPI[0m
tristate "Freescale DSPI controller"
select [31mCONFIG_REGMAP_MMIO[0m
depends on [31mCONFIG_HAS_DMA[0m
depends on [31mCONFIG_SOC_VF610[0m || [31mCONFIG_SOC_LS1021A[0m || [31mCONFIG_ARCH_LAYERSCAPE[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables support for the Freescale DSPI controller in master
mode. VF610 platform uses the controller.
config [31mCONFIG_SPI_FSL_ESPI[0m
tristate "Freescale eSPI controller"
depends on [31mCONFIG_FSL_SOC[0m
help
This enables using the Freescale eSPI controllers in master mode.
From MPC8536, 85xx platform uses the controller, and all P10xx,
P20xx, P30xx,P40xx, P50xx uses this controller.
config [31mCONFIG_SPI_MESON_SPIFC[0m
tristate "Amlogic Meson SPIFC controller"
depends on [31mCONFIG_ARCH_MESON[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_REGMAP_MMIO[0m
help
This enables master mode support for the SPIFC ([31mCONFIG_SPI[0m flash
controller) available in Amlogic Meson SoCs.
config [31mCONFIG_SPI_MT65XX[0m
tristate "MediaTek SPI controller"
depends on [31mCONFIG_ARCH_MEDIATEK[0m || [31mCONFIG_COMPILE_TEST[0m
help
This selects the MediaTek(R) [31mCONFIG_SPI[0m bus driver.
If you want to use MediaTek(R) [31mCONFIG_SPI[0m interface,
say Y or [31mCONFIG_M[0m here.If you are not sure, say N.
[31mCONFIG_SPI[0m drivers for Mediatek MT65XX and MT81XX series [31mCONFIG_ARM[0m SoCs.
config [31mCONFIG_SPI_NUC900[0m
tristate "Nuvoton NUC900 series SPI"
depends on [31mCONFIG_ARCH_W90X900[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m driver for Nuvoton NUC900 series [31mCONFIG_ARM[0m SoCs
config [31mCONFIG_SPI_OC_TINY[0m
tristate "OpenCores tiny SPI"
depends on [31mCONFIG_GPIOLIB[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This is the driver for OpenCores tiny [31mCONFIG_SPI[0m master controller.
config [31mCONFIG_SPI_OCTEON[0m
tristate "Cavium OCTEON SPI controller"
depends on [31mCONFIG_CAVIUM_OCTEON_SOC[0m
help
[31mCONFIG_SPI[0m host driver for the hardware found on some Cavium OCTEON
SOCs.
config [31mCONFIG_SPI_OMAP_UWIRE[0m
tristate "OMAP1 MicroWire"
depends on [31mCONFIG_ARCH_OMAP1[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This hooks up to the MicroWire controller on OMAP1 chips.
config [31mCONFIG_SPI_OMAP24XX[0m
tristate "McSPI driver for OMAP"
depends on [31mCONFIG_HAS_DMA[0m
depends on [31mCONFIG_ARCH_OMAP2PLUS[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_SG_SPLIT[0m
help
[31mCONFIG_SPI[0m master controller for OMAP24XX and later Multichannel [31mCONFIG_SPI[0m
(McSPI) modules.
config [31mCONFIG_SPI_TI_QSPI[0m
tristate "DRA7xxx QSPI controller support"
depends on [31mCONFIG_ARCH_OMAP2PLUS[0m || [31mCONFIG_COMPILE_TEST[0m
help
QSPI master controller for DRA7xxx used for flash devices.
This device supports single, dual and quad read support, while
it only supports single write mode.
config [31mCONFIG_SPI_OMAP_100K[0m
tristate "OMAP SPI 100K"
depends on [31mCONFIG_ARCH_OMAP850[0m || [31mCONFIG_ARCH_OMAP730[0m || [31mCONFIG_COMPILE_TEST[0m
help
OMAP [31mCONFIG_SPI[0m 100K master controller for omap7xx boards.
config [31mCONFIG_SPI_ORION[0m
tristate "Orion SPI master"
depends on [31mCONFIG_PLAT_ORION[0m || [31mCONFIG_ARCH_MVEBU[0m || [31mCONFIG_COMPILE_TEST[0m
help
This enables using the [31mCONFIG_SPI[0m master controller on the Orion
and MVEBU chips.
config [31mCONFIG_SPI_PIC32[0m
tristate "Microchip PIC32 series SPI"
depends on [31mCONFIG_MACH_PIC32[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for Microchip PIC32 [31mCONFIG_SPI[0m master controller.
config [31mCONFIG_SPI_PIC32_SQI[0m
tristate "Microchip PIC32 Quad SPI driver"
depends on [31mCONFIG_MACH_PIC32[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_DMA[0m
help
[31mCONFIG_SPI[0m driver for PIC32 Quad [31mCONFIG_SPI[0m controller.
config [31mCONFIG_SPI_PL022[0m
tristate "ARM AMBA PL022 SSP controller"
depends on [31mCONFIG_ARM_AMBA[0m
default y if [31mCONFIG_MACH_U300[0m
default y if [31mCONFIG_ARCH_REALVIEW[0m
default y if [31mCONFIG_INTEGRATOR_IMPD1[0m
default y if [31mCONFIG_ARCH_VERSATILE[0m
help
This selects the [31mCONFIG_ARM[0m(R) AMBA(R) PrimeCell PL022 SSP
controller. If you have an embedded system with an AMBA(R)
bus and a PL022 controller, say Y or [31mCONFIG_M[0m here.
config [31mCONFIG_SPI_PPC4xx[0m
tristate "PPC4xx SPI Controller"
depends on [31mCONFIG_PPC32[0m && [31mCONFIG_4xx[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This selects a driver for the PPC4xx [31mCONFIG_SPI[0m Controller.
config [31mCONFIG_SPI_PXA2XX[0m
tristate "PXA2xx SSP SPI master"
depends on ([31mCONFIG_ARCH_PXA[0m || [31mCONFIG_PCI[0m || [31mCONFIG_ACPI[0m)
select [31mCONFIG_PXA_SSP[0m if [31mCONFIG_ARCH_PXA[0m
help
This enables using a PXA2xx or Sodaville SSP port as a [31mCONFIG_SPI[0m master
controller. The driver can be configured to use any SSP port and
additional documentation can be found a Documentation/spi/pxa2xx.
config [31mCONFIG_SPI_PXA2XX_PCI[0m
def_tristate [31mCONFIG_SPI_PXA2XX[0m && [31mCONFIG_PCI[0m && [31mCONFIG_COMMON_CLK[0m
config [31mCONFIG_SPI_ROCKCHIP[0m
tristate "Rockchip SPI controller driver"
help
This selects a driver for Rockchip [31mCONFIG_SPI[0m controller.
If you say yes to this option, support will be included for
RK3066, RK3188 and RK3288 families of [31mCONFIG_SPI[0m controller.
Rockchip [31mCONFIG_SPI[0m controller support DMA transport and PIO mode.
The main usecase of this controller is to use spi flash as boot
device.
config [31mCONFIG_SPI_RB4XX[0m
tristate "Mikrotik RB4XX SPI master"
depends on [31mCONFIG_SPI_MASTER[0m && [31mCONFIG_ATH79[0m
help
[31mCONFIG_SPI[0m controller driver for the Mikrotik RB4xx series boards.
config [31mCONFIG_SPI_RSPI[0m
tristate "Renesas RSPI/QSPI controller"
depends on [31mCONFIG_SUPERH[0m || [31mCONFIG_ARCH_RENESAS[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for Renesas RSPI and QSPI blocks.
config [31mCONFIG_SPI_QUP[0m
tristate "Qualcomm SPI controller with QUP interface"
depends on [31mCONFIG_ARCH_QCOM[0m || ([31mCONFIG_ARM[0m && [31mCONFIG_COMPILE_TEST[0m)
help
Qualcomm Universal Peripheral (QUP) core is an AHB slave that
provides a common data path (an output FIFO and an input FIFO)
for serial peripheral interface ([31mCONFIG_SPI[0m) mini-core. [31mCONFIG_SPI[0m in master
mode supports up to 50MHz, up to four chip selects, programmable
data path from 4 bits to 32 bits and numerous protocol variants.
This driver can also be built as a module. If so, the module
will be called spi_qup.
config [31mCONFIG_SPI_S3C24XX[0m
tristate "Samsung S3C24XX series SPI"
depends on [31mCONFIG_ARCH_S3C24XX[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m driver for Samsung S3C24XX series [31mCONFIG_ARM[0m SoCs
config [31mCONFIG_SPI_S3C24XX_FIQ[0m
bool "S3C24XX driver with FIQ pseudo-DMA"
depends on [31mCONFIG_SPI_S3C24XX[0m
select [31mCONFIG_FIQ[0m
help
Enable [31mCONFIG_FIQ[0m support for the S3C24XX [31mCONFIG_SPI[0m driver to provide pseudo
DMA by using the fast-interrupt request framework, This allows
the driver to get DMA-like performance when there are either
no free DMA channels, or when doing transfers that required both
TX and RX data paths.
config [31mCONFIG_SPI_S3C64XX[0m
tristate "Samsung S3C64XX series type SPI"
depends on ([31mCONFIG_PLAT_SAMSUNG[0m || [31mCONFIG_ARCH_EXYNOS[0m || [31mCONFIG_COMPILE_TEST[0m)
help
[31mCONFIG_SPI[0m driver for Samsung S3C64XX and newer SoCs.
config [31mCONFIG_SPI_SC18IS602[0m
tristate "NXP SC18IS602/602B/603 I2C to SPI bridge"
depends on [31mCONFIG_I2C[0m
help
[31mCONFIG_SPI[0m driver for NXP SC18IS602/602B/603 [31mCONFIG_I2C[0m to [31mCONFIG_SPI[0m bridge.
config [31mCONFIG_SPI_SH_MSIOF[0m
tristate "SuperH MSIOF SPI controller"
depends on [31mCONFIG_HAVE_CLK[0m && [31mCONFIG_HAS_DMA[0m
depends on [31mCONFIG_ARCH_SHMOBILE[0m || [31mCONFIG_ARCH_RENESAS[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for SuperH and SH Mobile MSIOF blocks.
config [31mCONFIG_SPI_SH[0m
tristate "SuperH SPI controller"
depends on [31mCONFIG_SUPERH[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for SuperH [31mCONFIG_SPI[0m blocks.
config [31mCONFIG_SPI_SH_SCI[0m
tristate "SuperH SCI SPI controller"
depends on [31mCONFIG_SUPERH[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m driver for SuperH SCI blocks.
config [31mCONFIG_SPI_SH_HSPI[0m
tristate "SuperH HSPI controller"
depends on [31mCONFIG_ARCH_RENESAS[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for SuperH HSPI blocks.
config [31mCONFIG_SPI_SIRF[0m
tristate "CSR SiRFprimaII SPI controller"
depends on [31mCONFIG_SIRF_DMA[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m driver for CSR SiRFprimaII SoCs
config [31mCONFIG_SPI_ST_SSC4[0m
tristate "STMicroelectronics SPI SSC-based driver"
depends on [31mCONFIG_ARCH_STI[0m || [31mCONFIG_COMPILE_TEST[0m
help
STMicroelectronics SoCs support for [31mCONFIG_SPI[0m. If you say yes to
this option, support will be included for the SSC driven [31mCONFIG_SPI[0m.
config [31mCONFIG_SPI_SUN4I[0m
tristate "Allwinner A10 SoCs SPI controller"
depends on [31mCONFIG_ARCH_SUNXI[0m || [31mCONFIG_COMPILE_TEST[0m
help
[31mCONFIG_SPI[0m driver for Allwinner sun4i, sun5i and sun7i SoCs
config [31mCONFIG_SPI_SUN6I[0m
tristate "Allwinner A31 SPI controller"
depends on [31mCONFIG_ARCH_SUNXI[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_RESET_CONTROLLER[0m
help
This enables using the [31mCONFIG_SPI[0m controller on the Allwinner A31 SoCs.
config [31mCONFIG_SPI_MXS[0m
tristate "Freescale MXS SPI controller"
depends on [31mCONFIG_ARCH_MXS[0m
select [31mCONFIG_STMP_DEVICE[0m
help
[31mCONFIG_SPI[0m driver for Freescale MXS devices.
config [31mCONFIG_SPI_TEGRA114[0m
tristate "NVIDIA Tegra114 SPI Controller"
depends on ([31mCONFIG_ARCH_TEGRA[0m && [31mCONFIG_TEGRA20_APB_DMA[0m) || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_RESET_CONTROLLER[0m && [31mCONFIG_HAS_DMA[0m
help
[31mCONFIG_SPI[0m driver for NVIDIA Tegra114 [31mCONFIG_SPI[0m Controller interface. This controller
is different than the older SoCs [31mCONFIG_SPI[0m controller and also register interface
get changed with this controller.
config [31mCONFIG_SPI_TEGRA20_SFLASH[0m
tristate "Nvidia Tegra20 Serial flash Controller"
depends on [31mCONFIG_ARCH_TEGRA[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_RESET_CONTROLLER[0m
help
[31mCONFIG_SPI[0m driver for Nvidia Tegra20 Serial flash Controller interface.
The main usecase of this controller is to use spi flash as boot
device.
config [31mCONFIG_SPI_TEGRA20_SLINK[0m
tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
depends on ([31mCONFIG_ARCH_TEGRA[0m && [31mCONFIG_TEGRA20_APB_DMA[0m) || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_RESET_CONTROLLER[0m && [31mCONFIG_HAS_DMA[0m
help
[31mCONFIG_SPI[0m driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
config [31mCONFIG_SPI_THUNDERX[0m
tristate "Cavium ThunderX SPI controller"
depends on [31mCONFIG_PCI[0m && [31mCONFIG_64BIT[0m && ([31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m)
help
[31mCONFIG_SPI[0m host driver for the hardware found on Cavium ThunderX
SOCs.
config [31mCONFIG_SPI_TOPCLIFF_PCH[0m
tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
depends on [31mCONFIG_PCI[0m && ([31mCONFIG_X86_32[0m || [31mCONFIG_MIPS[0m || [31mCONFIG_COMPILE_TEST[0m)
help
[31mCONFIG_SPI[0m driver for the Topcliff PCH (Platform Controller Hub) [31mCONFIG_SPI[0m bus
used in some x86 embedded processors.
This driver also supports the ML7213/ML7223/ML7831, a companion chip
for the Atom E6xx series and compatible with the Intel EG20T PCH.
config [31mCONFIG_SPI_TXX9[0m
tristate "Toshiba TXx9 SPI controller"
depends on [31mCONFIG_GPIOLIB[0m && ([31mCONFIG_CPU_TX49XX[0m || [31mCONFIG_COMPILE_TEST[0m)
help
[31mCONFIG_SPI[0m driver for Toshiba TXx9 [31mCONFIG_MIPS[0m SoCs
config [31mCONFIG_SPI_XCOMM[0m
tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver"
depends on [31mCONFIG_I2C[0m
help
Support for the [31mCONFIG_SPI[0m-[31mCONFIG_I2C[0m bridge found on the Analog Devices
AD-FMCOMMS1-EBZ board.
config [31mCONFIG_SPI_XILINX[0m
tristate "Xilinx SPI controller common module"
depends on [31mCONFIG_HAS_IOMEM[0m
select [31mCONFIG_SPI_BITBANG[0m
help
This exposes the [31mCONFIG_SPI[0m controller IP from the Xilinx EDK.
See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
Product Specification document (DS464) for hardware details.
Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
config [31mCONFIG_SPI_XLP[0m
tristate "Netlogic XLP SPI controller driver"
depends on [31mCONFIG_CPU_XLP[0m || [31mCONFIG_ARCH_VULCAN[0m || [31mCONFIG_COMPILE_TEST[0m
help
Enable support for the [31mCONFIG_SPI[0m controller on the Netlogic XLP SoCs.
Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX, XLP9XX
and XLP5XX.
If you have a Netlogic XLP platform say Y here.
If unsure, say N.
config [31mCONFIG_SPI_XTENSA_XTFPGA[0m
tristate "Xtensa SPI controller for xtfpga"
depends on ([31mCONFIG_XTENSA[0m && [31mCONFIG_XTENSA_PLATFORM_XTFPGA[0m) || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_SPI_BITBANG[0m
help
[31mCONFIG_SPI[0m driver for xtfpga [31mCONFIG_SPI[0m master controller.
This simple [31mCONFIG_SPI[0m master controller is built into xtfpga bitstreams
and is used to control daughterboard audio codec. It always transfers
16 bit words in [31mCONFIG_SPI[0m mode 0, automatically asserting CS on transfer
start and deasserting on end.
config [31mCONFIG_SPI_ZYNQMP_GQSPI[0m
tristate "Xilinx ZynqMP GQSPI controller"
depends on [31mCONFIG_SPI_MASTER[0m && [31mCONFIG_HAS_DMA[0m
help
Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.
#
# Add new [31mCONFIG_SPI[0m master controllers in alphabetical order above this line
#
#
# There are lots of [31mCONFIG_SPI[0m device types, with sensors and memory
# being probably the most widely used ones.
#
comment "SPI Protocol Masters"
config [31mCONFIG_SPI_SPIDEV[0m
tristate "User mode SPI device driver support"
help
This supports user mode [31mCONFIG_SPI[0m protocol drivers.
Note that this application programming interface is EXPERIMENTAL
and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
config [31mCONFIG_SPI_LOOPBACK_TEST[0m
tristate "spi loopback test framework support"
depends on m
help
This enables the [31mCONFIG_SPI[0m loopback testing framework driver
primarily used for development of spi_master drivers
and to detect regressions
config [31mCONFIG_SPI_TLE62X0[0m
tristate "Infineon TLE62X0 (for power switching)"
depends on [31mCONFIG_SYSFS[0m
help
[31mCONFIG_SPI[0m driver for Infineon TLE62X0 series line driver chips,
such as the TLE6220, TLE6230 and TLE6240. This provides a
sysfs interface, with each line presented as a kind of GPIO
exposing both switch control and diagnostic feedback.
#
# Add new [31mCONFIG_SPI[0m protocol masters in alphabetical order above this line
#
endif # [31mCONFIG_SPI_MASTER[0m
# (slave support would go here)
endif # [31mCONFIG_SPI[0m