Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 15044 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 15188 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 15852 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 5477 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 7053 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/si/sid.h, line 2056 (as a macro)