config [31mCONFIG_FRV[0m
bool
default y
select [31mCONFIG_HAVE_IDE[0m
select [31mCONFIG_HAVE_ARCH_TRACEHOOK[0m
select [31mCONFIG_HAVE_PERF_EVENTS[0m
select [31mCONFIG_HAVE_UID16[0m
select [31mCONFIG_VIRT_TO_BUS[0m
select [31mCONFIG_GENERIC_IRQ_SHOW[0m
select [31mCONFIG_HAVE_DEBUG_BUGVERBOSE[0m
select [31mCONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG[0m
select [31mCONFIG_GENERIC_CPU_DEVICES[0m
select [31mCONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED[0m
select [31mCONFIG_ARCH_WANT_IPC_PARSE_VERSION[0m
select [31mCONFIG_OLD_SIGSUSPEND3[0m
select [31mCONFIG_OLD_SIGACTION[0m
select [31mCONFIG_HAVE_DEBUG_STACKOVERFLOW[0m
select [31mCONFIG_ARCH_NO_COHERENT_DMA_MMAP[0m
config [31mCONFIG_ZONE_DMA[0m
bool
default y
config [31mCONFIG_RWSEM_GENERIC_SPINLOCK[0m
bool
default y
config [31mCONFIG_RWSEM_XCHGADD_ALGORITHM[0m
bool
config [31mCONFIG_GENERIC_HWEIGHT[0m
bool
default y
config [31mCONFIG_GENERIC_CALIBRATE_DELAY[0m
bool
default n
config [31mCONFIG_TIME_LOW_RES[0m
bool
default y
config [31mCONFIG_QUICKLIST[0m
bool
default y
config [31mCONFIG_ARCH_HAS_ILOG2_U32[0m
bool
default y
config [31mCONFIG_ARCH_HAS_ILOG2_U64[0m
bool
default y
config [31mCONFIG_HZ[0m
int
default 1000
source "init/Kconfig"
source "kernel/Kconfig.freezer"
menu "Fujitsu FR-V system setup"
config [31mCONFIG_MMU[0m
bool "MMU support"
help
This options switches on and off support for the FR-V [31mCONFIG_MMU[0m
(effectively switching between vmlinux and uClinux). Not all FR-V
CPUs support this. Currently only the FR451 has a sufficiently
featured [31mCONFIG_MMU[0m.
config [31mCONFIG_FRV_OUTOFLINE_ATOMIC_OPS[0m
bool "Out-of-line the FRV atomic operations"
default n
help
Setting this option causes the FR-V atomic operations to be mostly
implemented out-of-line.
See Documentation/frv/atomic-ops.txt for more information.
config [31mCONFIG_HIGHMEM[0m
bool "High memory support"
depends on [31mCONFIG_MMU[0m
default y
help
If you wish to use more than 256MB of memory with your [31mCONFIG_MMU[0m based
system, you will need to select this option. The kernel can only see
the memory between 0xC0000000 and 0xD0000000 directly... everything
else must be kmapped.
The arch is, however, capable of supporting up to 3GB of SDRAM.
config [31mCONFIG_HIGHPTE[0m
bool "Allocate page tables in highmem"
depends on [31mCONFIG_HIGHMEM[0m
default y
help
The VM uses one page of memory for each page table. For systems
with a lot of RAM, this can be wasteful of precious low memory.
Setting this option will put user-space page tables in high memory.
source "mm/Kconfig"
choice
prompt "uClinux kernel load address"
depends on ![31mCONFIG_MMU[0m
default [31mCONFIG_UCPAGE_OFFSET_C0000000[0m
help
This option sets the base address for the uClinux kernel. The kernel
will rearrange the SDRAM layout to start at this address, and move
itself to start there. It must be greater than 0, and it must be
sufficiently less than 0xE0000000 that the SDRAM does not intersect
the I/O region.
The base address must also be aligned such that the SDRAM controller
can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
config [31mCONFIG_UCPAGE_OFFSET_20000000[0m
bool "0x20000000"
config [31mCONFIG_UCPAGE_OFFSET_40000000[0m
bool "0x40000000"
config [31mCONFIG_UCPAGE_OFFSET_60000000[0m
bool "0x60000000"
config [31mCONFIG_UCPAGE_OFFSET_80000000[0m
bool "0x80000000"
config [31mCONFIG_UCPAGE_OFFSET_A0000000[0m
bool "0xA0000000"
config [31mCONFIG_UCPAGE_OFFSET_C0000000[0m
bool "0xC0000000 (Recommended)"
endchoice
config [31mCONFIG_PAGE_OFFSET[0m
hex
default 0x20000000 if [31mCONFIG_UCPAGE_OFFSET_20000000[0m
default 0x40000000 if [31mCONFIG_UCPAGE_OFFSET_40000000[0m
default 0x60000000 if [31mCONFIG_UCPAGE_OFFSET_60000000[0m
default 0x80000000 if [31mCONFIG_UCPAGE_OFFSET_80000000[0m
default 0xA0000000 if [31mCONFIG_UCPAGE_OFFSET_A0000000[0m
default 0xC0000000
config [31mCONFIG_PROTECT_KERNEL[0m
bool "Protect core kernel against userspace"
depends on ![31mCONFIG_MMU[0m
default y
help
Selecting this option causes the uClinux kernel to change the
permittivity of DAMPR register covering the core kernel image to
prevent userspace accessing the underlying memory directly.
choice
prompt "CPU Caching mode"
default [31mCONFIG_FRV_DEFL_CACHE_WBACK[0m
help
This option determines the default caching mode for the kernel.
Write-Back caching mode involves the all reads and writes causing
the affected cacheline to be read into the cache first before being
operated upon. Memory is not then updated by a write until the cache
is filled and a cacheline needs to be displaced from the cache to
make room. Only at that point is it written back.
Write-Behind caching is similar to Write-Back caching, except that a
write won't fetch a cacheline into the cache if there isn't already
one there; it will write directly to memory instead.
Write-Through caching only fetches cachelines from memory on a
read. Writes always get written directly to memory. If the affected
cacheline is also in cache, it will be updated too.
The final option is to turn of caching entirely.
Note that not all CPUs support Write-Behind caching. If the CPU on
which the kernel is running doesn't, it'll fall back to Write-Back
caching.
config [31mCONFIG_FRV_DEFL_CACHE_WBACK[0m
bool "Write-Back"
config [31mCONFIG_FRV_DEFL_CACHE_WBEHIND[0m
bool "Write-Behind"
config [31mCONFIG_FRV_DEFL_CACHE_WTHRU[0m
bool "Write-Through"
config [31mCONFIG_FRV_DEFL_CACHE_DISABLED[0m
bool "Disabled"
endchoice
menu "CPU core support"
config [31mCONFIG_CPU_FR401[0m
bool "Include FR401 core support"
depends on ![31mCONFIG_MMU[0m
default y
help
This enables support for the FR401, FR401A and FR403 CPUs
config [31mCONFIG_CPU_FR405[0m
bool "Include FR405 core support"
depends on ![31mCONFIG_MMU[0m
default y
help
This enables support for the FR405 CPU
config [31mCONFIG_CPU_FR451[0m
bool "Include FR451 core support"
default y
help
This enables support for the FR451 CPU
config [31mCONFIG_CPU_FR451_COMPILE[0m
bool "Specifically compile for FR451 core"
depends on [31mCONFIG_CPU_FR451[0m && ![31mCONFIG_CPU_FR401[0m && ![31mCONFIG_CPU_FR405[0m && ![31mCONFIG_CPU_FR551[0m
default y
help
This causes appropriate flags to be passed to the compiler to
optimise for the FR451 CPU
config [31mCONFIG_CPU_FR551[0m
bool "Include FR551 core support"
depends on ![31mCONFIG_MMU[0m
default y
help
This enables support for the FR555 CPU
config [31mCONFIG_CPU_FR551_COMPILE[0m
bool "Specifically compile for FR551 core"
depends on [31mCONFIG_CPU_FR551[0m && ![31mCONFIG_CPU_FR401[0m && ![31mCONFIG_CPU_FR405[0m && ![31mCONFIG_CPU_FR451[0m
default y
help
This causes appropriate flags to be passed to the compiler to
optimise for the FR555 CPU
config [31mCONFIG_FRV_L1_CACHE_SHIFT[0m
int
default "5" if [31mCONFIG_CPU_FR401[0m || [31mCONFIG_CPU_FR405[0m || [31mCONFIG_CPU_FR451[0m
default "6" if [31mCONFIG_CPU_FR551[0m
endmenu
choice
prompt "System support"
default [31mCONFIG_MB93091_VDK[0m
config [31mCONFIG_MB93091_VDK[0m
bool "MB93091 CPU board with or without motherboard"
config [31mCONFIG_MB93093_PDK[0m
bool "MB93093 PDK unit"
endchoice
if [31mCONFIG_MB93091_VDK[0m
choice
prompt "Motherboard support"
default [31mCONFIG_MB93090_MB00[0m
config [31mCONFIG_MB93090_MB00[0m
bool "Use the MB93090-MB00 motherboard"
help
Select this option if the MB93091 CPU board is going to be used with
a MB93090-MB00 VDK motherboard
config [31mCONFIG_MB93091_NO_MB[0m
bool "Use standalone"
help
Select this option if the MB93091 CPU board is going to be used
without a motherboard
endchoice
endif
config [31mCONFIG_FUJITSU_MB93493[0m
bool "MB93493 Multimedia chip"
help
Select this option if the MB93493 multimedia chip is going to be
used.
choice
prompt "GP-Relative data support"
default [31mCONFIG_GPREL_DATA_8[0m
help
This option controls what data, if any, should be placed in the GP
relative data sections. Using this means that the compiler can
generate accesses to the data using GR16-relative addressing which
is faster than absolute instructions and saves space (2 instructions
per access).
However, the GPREL region is limited in size because the immediate
value used in the load and store instructions is limited to a 12-bit
signed number.
So if the linker starts complaining that accesses to GPREL data are
out of range, try changing this option from the default.
Note that modules will always be compiled with this feature disabled
as the module data will not be in range of the GP base address.
config [31mCONFIG_GPREL_DATA_8[0m
bool "Put data objects of up to 8 bytes into GP-REL"
config [31mCONFIG_GPREL_DATA_4[0m
bool "Put data objects of up to 4 bytes into GP-REL"
config [31mCONFIG_GPREL_DATA_NONE[0m
bool "Don't use GP-REL"
endchoice
config [31mCONFIG_FRV_ONCPU_SERIAL[0m
bool "Use on-CPU serial ports"
select [31mCONFIG_SERIAL_8250[0m
default y
config [31mCONFIG_PCI[0m
bool "Use PCI"
depends on [31mCONFIG_MB93090_MB00[0m
default y
select [31mCONFIG_GENERIC_PCI_IOMAP[0m
help
Some FR-V systems (such as the MB93090-MB00 VDK) have [31mCONFIG_PCI[0m
onboard. If you have one of these boards and you wish to use the [31mCONFIG_PCI[0m
facilities, say Y here.
config [31mCONFIG_RESERVE_DMA_COHERENT[0m
bool "Reserve DMA coherent memory"
depends on [31mCONFIG_PCI[0m && ![31mCONFIG_MMU[0m
default y
help
Many [31mCONFIG_PCI[0m drivers require access to uncached memory for DMA device
communications (such as is done with some Ethernet buffer rings). If
a fully featured [31mCONFIG_MMU[0m is available, this can be done through page
table settings, but if not, a region has to be set aside and marked
with a special DAMPR register.
Setting this option causes uClinux to set aside a portion of the
available memory for use in this manner. The memory will then be
unavailable for normal kernel use.
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
menu "Power management options"
config [31mCONFIG_ARCH_SUSPEND_POSSIBLE[0m
def_bool y
source kernel/power/Kconfig
endmenu
endmenu
menu "Executable formats"
source "fs/Kconfig.binfmt"
endmenu
source "net/Kconfig"
source "drivers/Kconfig"
source "fs/Kconfig"
source "arch/frv/Kconfig.debug"
source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"