/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2003 by Ralf Baechle */ #ifndef __ASM_MACH_GENERIC_IRQ_H #define __ASM_MACH_GENERIC_IRQ_H #ifndef NR_IRQS #define NR_IRQS 128 #endif #ifdef [31mCONFIG_I8259[0m #ifndef I8259A_IRQ_BASE #define I8259A_IRQ_BASE 0 #endif #endif #ifdef [31mCONFIG_IRQ_MIPS_CPU[0m #ifndef MIPS_CPU_IRQ_BASE #ifdef [31mCONFIG_I8259[0m #define MIPS_CPU_IRQ_BASE 16 #else #define MIPS_CPU_IRQ_BASE 0 #endif /* CONFIG_I8259 */ #endif #ifdef [31mCONFIG_IRQ_CPU_RM7K[0m #ifndef RM7K_CPU_IRQ_BASE #define RM7K_CPU_IRQ_BASE (MIPS_CPU_IRQ_BASE+8) #endif #endif #endif /* CONFIG_IRQ_MIPS_CPU */ #ifdef [31mCONFIG_MIPS_GIC[0m #ifndef MIPS_GIC_IRQ_BASE #define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) #endif #endif /* CONFIG_MIPS_GIC */ #endif /* __ASM_MACH_GENERIC_IRQ_H */ |