1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 | #ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_ #define _ASM_POWERPC_BOOK3S_64_MMU_H_ #ifndef __ASSEMBLY__ /* * Page size definition * * shift : is the "PAGE_SHIFT" value for that page size * sllp : is a bit mask with the value of SLB L || LP to be or'ed * directly to a slbmte "vsid" value * penc : is the HPTE encoding mask for the "LP" field: * */ struct mmu_psize_def { unsigned int shift; /* number of bits */ int penc[MMU_PAGE_COUNT]; /* HPTE encoding */ unsigned int tlbiel; /* tlbiel supported for that page size */ unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */ union { unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */ unsigned long ap; /* Ap encoding used by PowerISA 3.0 */ }; }; extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; #endif /* __ASSEMBLY__ */ /* 64-bit classic hash table MMU */ #include <asm/book3s/64/mmu-hash.h> #ifndef __ASSEMBLY__ /* * ISA 3.0 partiton and process table entry format */ struct prtb_entry { __be64 prtb0; __be64 prtb1; }; extern struct prtb_entry *process_tb; struct patb_entry { __be64 patb0; __be64 patb1; }; extern struct patb_entry *partition_tb; #define PATB_HR (1UL << 63) #define PATB_GR (1UL << 63) #define RPDB_MASK 0x0ffffffffffff00fUL #define RPDB_SHIFT (1UL << 8) /* * Limit process table to PAGE_SIZE table. This * also limit the max pid we can support. * MAX_USER_CONTEXT * 16 bytes of space. */ #define PRTB_SIZE_SHIFT (CONTEXT_BITS + 4) /* * Power9 currently only support 64K partition table size. */ #define PATB_SIZE_SHIFT 16 typedef unsigned long mm_context_id_t; struct spinlock; typedef struct { mm_context_id_t id; u16 user_psize; /* page size index */ #ifdef [31mCONFIG_PPC_MM_SLICES[0m u64 low_slices_psize; /* SLB page size encodings */ unsigned char high_slices_psize[SLICE_ARRAY_SIZE]; #else u16 sllp; /* SLB page size encoding */ #endif unsigned long vdso_base; #ifdef [31mCONFIG_PPC_SUBPAGE_PROT[0m struct subpage_prot_table spt; #endif /* CONFIG_PPC_SUBPAGE_PROT */ #ifdef [31mCONFIG_PPC_ICSWX[0m struct spinlock *cop_lockp; /* guard acop and cop_pid */ unsigned long acop; /* mask of enabled coprocessor types */ unsigned int cop_pid; /* pid value used with coprocessors */ #endif /* CONFIG_PPC_ICSWX */ #ifdef [31mCONFIG_PPC_64K_PAGES[0m /* for 4K PTE fragment support */ void *pte_frag; #endif #ifdef [31mCONFIG_SPAPR_TCE_IOMMU[0m struct list_head iommu_group_mem_list; #endif } mm_context_t; /* * The current system page and segment sizes */ extern int mmu_linear_psize; extern int mmu_virtual_psize; extern int mmu_vmalloc_psize; extern int mmu_vmemmap_psize; extern int mmu_io_psize; /* MMU initialization */ void mmu_early_init_devtree(void); void hash__early_init_devtree(void); void radix__early_init_devtree(void); extern void radix_init_native(void); extern void hash__early_init_mmu(void); extern void radix__early_init_mmu(void); static inline void early_init_mmu(void) { if (radix_enabled()) return radix__early_init_mmu(); return hash__early_init_mmu(); } extern void hash__early_init_mmu_secondary(void); extern void radix__early_init_mmu_secondary(void); static inline void early_init_mmu_secondary(void) { if (radix_enabled()) return radix__early_init_mmu_secondary(); return hash__early_init_mmu_secondary(); } extern void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base, phys_addr_t first_memblock_size); extern void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base, phys_addr_t first_memblock_size); static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base, phys_addr_t first_memblock_size) { if (early_radix_enabled()) return radix__setup_initial_memory_limit(first_memblock_base, first_memblock_size); return hash__setup_initial_memory_limit(first_memblock_base, first_memblock_size); } extern int (*register_process_table)(unsigned long base, unsigned long page_size, unsigned long tbl_size); #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */ |