config [31mCONFIG_BF52x[0m
def_bool y
depends on ([31mCONFIG_BF522[0m || [31mCONFIG_BF523[0m || [31mCONFIG_BF524[0m || [31mCONFIG_BF525[0m || [31mCONFIG_BF526[0m || [31mCONFIG_BF527[0m)
if ([31mCONFIG_BF52x[0m)
source "arch/blackfin/mach-bf527/boards/Kconfig"
menu "BF527 Specific Configuration"
comment "Alternative Multiplexing Scheme"
choice
prompt "SPORT0"
default [31mCONFIG_BF527_SPORT0_PORTG[0m
help
Select PORT used for SPORT0. See Hardware Reference Manual
config [31mCONFIG_BF527_SPORT0_PORTF[0m
bool "PORT F"
help
PORT F
config [31mCONFIG_BF527_SPORT0_PORTG[0m
bool "PORT G"
help
PORT [31mCONFIG_G[0m
endchoice
choice
prompt "SPORT0 TSCLK Location"
depends on [31mCONFIG_BF527_SPORT0_PORTG[0m
default [31mCONFIG_BF527_SPORT0_TSCLK_PG10[0m
help
Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
config [31mCONFIG_BF527_SPORT0_TSCLK_PG10[0m
bool "PORT PG10"
help
PORT PG10
config [31mCONFIG_BF527_SPORT0_TSCLK_PG14[0m
bool "PORT PG14"
help
PORT PG14
endchoice
choice
prompt "UART1"
default [31mCONFIG_BF527_UART1_PORTF[0m
help
Select PORT used for UART1. See Hardware Reference Manual
config [31mCONFIG_BF527_UART1_PORTF[0m
bool "PORT F"
help
PORT F
config [31mCONFIG_BF527_UART1_PORTG[0m
bool "PORT G"
help
PORT [31mCONFIG_G[0m
endchoice
choice
prompt "NAND (NFC) Data"
default [31mCONFIG_BF527_NAND_D_PORTH[0m
help
Select PORT used for NAND Data Bus. See Hardware Reference Manual
config [31mCONFIG_BF527_NAND_D_PORTF[0m
bool "PORT F"
help
PORT F
config [31mCONFIG_BF527_NAND_D_PORTH[0m
bool "PORT H"
help
PORT H
endchoice
comment "Hysteresis/Schmitt Trigger Control"
config [31mCONFIG_BFIN_HYSTERESIS_CONTROL[0m
bool "Enable Hysteresis Control"
help
The ADSP-[31mCONFIG_BF52x[0m allows to control input hysteresis for Port F,
Port [31mCONFIG_G[0m and Port H and other processor signal inputs.
The Schmitt trigger enables can be set only for pin groups.
Saying Y will overwrite the default reset or boot loader
initialization.
menu "PORT F"
depends on [31mCONFIG_BFIN_HYSTERESIS_CONTROL[0m
config [31mCONFIG_GPIO_HYST_PORTF_0_7[0m
bool "Enable Hysteresis on PORTF {0...7}"
config [31mCONFIG_GPIO_HYST_PORTF_8_9[0m
bool "Enable Hysteresis on PORTF {8, 9}"
config [31mCONFIG_GPIO_HYST_PORTF_10[0m
bool "Enable Hysteresis on PORTF 10"
config [31mCONFIG_GPIO_HYST_PORTF_11[0m
bool "Enable Hysteresis on PORTF 11"
config [31mCONFIG_GPIO_HYST_PORTF_12_13[0m
bool "Enable Hysteresis on PORTF {12, 13}"
config [31mCONFIG_GPIO_HYST_PORTF_14_15[0m
bool "Enable Hysteresis on PORTF {14, 15}"
endmenu
menu "PORT G"
depends on [31mCONFIG_BFIN_HYSTERESIS_CONTROL[0m
config [31mCONFIG_GPIO_HYST_PORTG_0[0m
bool "Enable Hysteresis on PORTG 0"
config [31mCONFIG_GPIO_HYST_PORTG_1_4[0m
bool "Enable Hysteresis on PORTG {1...4}"
config [31mCONFIG_GPIO_HYST_PORTG_5_6[0m
bool "Enable Hysteresis on PORTG {5, 6}"
config [31mCONFIG_GPIO_HYST_PORTG_7_8[0m
bool "Enable Hysteresis on PORTG {7, 8}"
config [31mCONFIG_GPIO_HYST_PORTG_9[0m
bool "Enable Hysteresis on PORTG 9"
config [31mCONFIG_GPIO_HYST_PORTG_10[0m
bool "Enable Hysteresis on PORTG 10"
config [31mCONFIG_GPIO_HYST_PORTG_11_13[0m
bool "Enable Hysteresis on PORTG {11...13}"
config [31mCONFIG_GPIO_HYST_PORTG_14_15[0m
bool "Enable Hysteresis on PORTG {14, 15}"
endmenu
menu "PORT H"
depends on [31mCONFIG_BFIN_HYSTERESIS_CONTROL[0m
config [31mCONFIG_GPIO_HYST_PORTH_0_7[0m
bool "Enable Hysteresis on PORTH {0...7}"
config [31mCONFIG_GPIO_HYST_PORTH_8[0m
bool "Enable Hysteresis on PORTH 8"
config [31mCONFIG_GPIO_HYST_PORTH_9_15[0m
bool "Enable Hysteresis on PORTH {9...15}"
endmenu
menu "None-GPIO"
depends on [31mCONFIG_BFIN_HYSTERESIS_CONTROL[0m
config [31mCONFIG_NONEGPIO_HYST_TMR0_FS1_PPICLK[0m
bool "Enable Hysteresis on {TMR0, PPI_FS1, PPI_CLK}"
config [31mCONFIG_NONEGPIO_HYST_NMI_RST_BMODE[0m
bool "Enable Hysteresis on {NMI, RESET, BMODE}"
config [31mCONFIG_NONEGPIO_HYST_JTAG[0m
bool "Enable Hysteresis on JTAG"
endmenu
comment "Interrupt Priority Assignment"
menu "Priority"
config [31mCONFIG_IRQ_PLL_WAKEUP[0m
int "IRQ_PLL_WAKEUP"
default 7
config [31mCONFIG_IRQ_DMA0_ERROR[0m
int "IRQ_DMA0_ERROR"
default 7
config [31mCONFIG_IRQ_DMAR0_BLK[0m
int "IRQ_DMAR0_BLK"
default 7
config [31mCONFIG_IRQ_DMAR1_BLK[0m
int "IRQ_DMAR1_BLK"
default 7
config [31mCONFIG_IRQ_DMAR0_OVR[0m
int "IRQ_DMAR0_OVR"
default 7
config [31mCONFIG_IRQ_DMAR1_OVR[0m
int "IRQ_DMAR1_OVR"
default 7
config [31mCONFIG_IRQ_PPI_ERROR[0m
int "IRQ_PPI_ERROR"
default 7
config [31mCONFIG_IRQ_MAC_ERROR[0m
int "IRQ_MAC_ERROR"
default 7
config [31mCONFIG_IRQ_SPORT0_ERROR[0m
int "IRQ_SPORT0_ERROR"
default 7
config [31mCONFIG_IRQ_SPORT1_ERROR[0m
int "IRQ_SPORT1_ERROR"
default 7
config [31mCONFIG_IRQ_UART0_ERROR[0m
int "IRQ_UART0_ERROR"
default 7
config [31mCONFIG_IRQ_UART1_ERROR[0m
int "IRQ_UART1_ERROR"
default 7
config [31mCONFIG_IRQ_RTC[0m
int "IRQ_RTC"
default 8
config [31mCONFIG_IRQ_PPI[0m
int "IRQ_PPI"
default 8
config [31mCONFIG_IRQ_SPORT0_RX[0m
int "IRQ_SPORT0_RX"
default 9
config [31mCONFIG_IRQ_SPORT0_TX[0m
int "IRQ_SPORT0_TX"
default 9
config [31mCONFIG_IRQ_SPORT1_RX[0m
int "IRQ_SPORT1_RX"
default 9
config [31mCONFIG_IRQ_SPORT1_TX[0m
int "IRQ_SPORT1_TX"
default 9
config [31mCONFIG_IRQ_TWI[0m
int "IRQ_TWI"
default 10
config [31mCONFIG_IRQ_SPI[0m
int "IRQ_SPI"
default 10
config [31mCONFIG_IRQ_UART0_RX[0m
int "IRQ_UART0_RX"
default 10
config [31mCONFIG_IRQ_UART0_TX[0m
int "IRQ_UART0_TX"
default 10
config [31mCONFIG_IRQ_UART1_RX[0m
int "IRQ_UART1_RX"
default 10
config [31mCONFIG_IRQ_UART1_TX[0m
int "IRQ_UART1_TX"
default 10
config [31mCONFIG_IRQ_OPTSEC[0m
int "IRQ_OPTSEC"
default 11
config [31mCONFIG_IRQ_CNT[0m
int "IRQ_CNT"
default 11
config [31mCONFIG_IRQ_MAC_RX[0m
int "IRQ_MAC_RX"
default 11
config [31mCONFIG_IRQ_PORTH_INTA[0m
int "IRQ_PORTH_INTA"
default 11
config [31mCONFIG_IRQ_MAC_TX[0m
int "IRQ_MAC_TX/NFC"
default 11
config [31mCONFIG_IRQ_PORTH_INTB[0m
int "IRQ_PORTH_INTB"
default 11
config [31mCONFIG_IRQ_TIMER0[0m
int "IRQ_TIMER0"
default 7 if [31mCONFIG_TICKSOURCE_GPTMR0[0m
default 8
config [31mCONFIG_IRQ_TIMER1[0m
int "IRQ_TIMER1"
default 12
config [31mCONFIG_IRQ_TIMER2[0m
int "IRQ_TIMER2"
default 12
config [31mCONFIG_IRQ_TIMER3[0m
int "IRQ_TIMER3"
default 12
config [31mCONFIG_IRQ_TIMER4[0m
int "IRQ_TIMER4"
default 12
config [31mCONFIG_IRQ_TIMER5[0m
int "IRQ_TIMER5"
default 12
config [31mCONFIG_IRQ_TIMER6[0m
int "IRQ_TIMER6"
default 12
config [31mCONFIG_IRQ_TIMER7[0m
int "IRQ_TIMER7"
default 12
config [31mCONFIG_IRQ_PORTG_INTA[0m
int "IRQ_PORTG_INTA"
default 12
config [31mCONFIG_IRQ_PORTG_INTB[0m
int "IRQ_PORTG_INTB"
default 12
config [31mCONFIG_IRQ_MEM_DMA0[0m
int "IRQ_MEM_DMA0"
default 13
config [31mCONFIG_IRQ_MEM_DMA1[0m
int "IRQ_MEM_DMA1"
default 13
config [31mCONFIG_IRQ_WATCH[0m
int "IRQ_WATCH"
default 13
config [31mCONFIG_IRQ_PORTF_INTA[0m
int "IRQ_PORTF_INTA"
default 13
config [31mCONFIG_IRQ_PORTF_INTB[0m
int "IRQ_PORTF_INTB"
default 13
config [31mCONFIG_IRQ_SPI_ERROR[0m
int "IRQ_SPI_ERROR"
default 7
config [31mCONFIG_IRQ_NFC_ERROR[0m
int "IRQ_NFC_ERROR"
default 7
config [31mCONFIG_IRQ_HDMA_ERROR[0m
int "IRQ_HDMA_ERROR"
default 7
config [31mCONFIG_IRQ_HDMA[0m
int "IRQ_HDMA"
default 7
config [31mCONFIG_IRQ_USB_EINT[0m
int "IRQ_USB_EINT"
default 10
config [31mCONFIG_IRQ_USB_INT0[0m
int "IRQ_USB_INT0"
default 10
config [31mCONFIG_IRQ_USB_INT1[0m
int "IRQ_USB_INT1"
default 10
config [31mCONFIG_IRQ_USB_INT2[0m
int "IRQ_USB_INT2"
default 10
config [31mCONFIG_IRQ_USB_DMA[0m
int "IRQ_USB_DMA"
default 10
help
Enter the priority numbers between 7-13 ONLY. Others are Reserved.
This applies to all the above. It is not recommended to assign the
highest priority number 7 to UART or any other device.
endmenu
endmenu
endif