Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 4916 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 10820 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h, line 41412 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h, line 49587 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h, line 44047 (as a macro)