Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 3552 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 3640 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 9985 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 3512 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 3648 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h, line 40597 (as a macro)