Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h, line 10908 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h, line 6982 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h, line 7219 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h, line 7255 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h, line 1230 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_d.h, line 661 (as a macro)